• State
  • Locked Locked
  • Replies 4 replies
  • Subscribers 30 subscribers
  • Views 562 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

[ DRV8303 ] Output Disable without EN_GATE control

Kenichiro
Mastermind 9165 points
Other Parts Discussed in Thread: DRV8303

[ DRV8303 ] Output Disable without EN_GATE control

Hi,

Can you please let me know whether DRV8303 output can be disabled without EN_GATE pin control?

I know that DRV8303 can be in low-power mode by pulling EN_GATE pin to low (longer than 10uS), however when DRV8303 exit from this mode, normal power up sequence run, this means all of settings of control register is reset.

My customer prefer to keep register value as it is, then put only output stage into disable mode. Is it possible?

Thank you for your support in advance.

Regards,

Ken

  • 0
    TI__Mastermind 26065 points

    Hi Ken,

    We will check this and get back later.

    Best regards,

  • 0 in reply to Wilson Zuo
    TI__Mastermind 26065 points
    Hi Ken,

    Do you want to disable the output of the gate driver or the output of the half bridge?
    In 6-PWM mode, see table 1 of the datasheet, when INx = 0, the related high side or low side gate driver output is LOW, and the MOSFET is OFF. For example, INL_A = 0 and INH_A = 0 can put the half bridge A into High-Z output (disabled).

    Best regards,
  • 0 in reply to Wilson Zuo
    Mastermind 9165 points
    Hi Wilson,

    Thank you for your support. I think either way is okay that disabling gate driver block of RDV8303 or disabling half bridge itself.

    I discussed with customer today that their MCU cannot output constant Low signal from PWM output due to some limitations. This means that the way to input Low to INL_x and INH_x is not possible.

    Is there any other ways that put DRV8303 into stand-by mode with maintain register value?

    Thanks,
    Ken
  • 0 in reply to Kenichiro
    TI__Mastermind 21320 points

    Hi Ken,

    EN_GATE = LOW disables the entire gate drive block. The device will rely on it's passive pull downs to keep the half-bridge disabled.

    INH/INL = LOW disables the half-bridge by pulling the gate outputs low.

    This is no other method to disable the half-bridge outside of a FAULT condition occurring.

    If customer does not want to use EN_GATE gate and can't hold INH and INL low they may have to use some external circuitry.

    One idea is to add an AND gate to the INH and INL inputs and connect it to a GPIO from the MCU. If the GPIO = LOW, all the inputs will be LOW. If the GPIO = HIGH, all the inputs will pass normally.