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Seeking clarification on MOSFET sizing for DRV8301 & DRV8305

Other Parts Discussed in Thread: DRV8301, DRV8305

Hello -

I am desigining custom hardware, and am a bit stuck on sizing MOSFETs properly to the DRV8301/DRV8305 drivers.

In both datasheets, the following equation is given to estimate RMS load on the driver (with a max of 30mA in either case):

Gate Drive RMS Current = MOSFET Qg × Number of Switching MOSFETs × Switching Frequency 

Since the DRV8301 has 1.7A source/2.3A sink capability and the DRV8305 has 1A source/1.25A sink capability, I don't understand how they both have the same max RMS load?

The bottom line is I am trying to determine the largest FETs I can effectively use with either driver chip. Based on the given equation, I come up with the following (one design will require 20kHz PWM, one will require 45kHz):

20kHz:

30mA = 250nC * 6 * 20kHz (according to the equation, I can use FETs with up to 250nC Qg)

45Khz:

30mA = 111nC * 6 * 45kHz (according to the equation, I can use FETs with up to 111nC Qg)

Is this correct? If so, can you please explain how this 30mA RMS load translates into the drivers sink/source capability? It just seems like I am missing something.

Any help is much appreciated!

-asifjahmed


  • Hi Asif,

    Since the DRV8301 has 1.7A source/2.3A sink capability and the DRV8305 has 1A source/1.25A sink capability, I don't understand how they both have the same max RMS load?


    The 30 mA does not directly relate to the sink/source capability. It is related to the capability of the voltage supply for the gate drivers. This happens to be the same for DRV8301 (GVDD) and DRV8305 (VCPH).

    Is this correct? If so, can you please explain how this 30mA RMS load translates into the drivers sink/source capability? It just seems like I am missing something.

    One thing to note is that it is not always "6" for the number of MOSFETs switching. This depends on the commutation algorithm.

    But yes, with those switching frequencies and 6 MOSFETs switching your calculations are correct.

    The sink/source capability comes into play when determining how fast the MOSFET (tr and tf) will slew during turn ON and turn OFF. We have an app note that covers some of these topics.

    www.ti.com/.../slva714.pdf

  • Thanks very much Nick! Very helpful.
  • To clarify - to your comment about not always using 6 MOSFETs - are you referring to the possibility of using more than 6 (multiples of 6)? Or something else that I'm not familiar with?
  • I am referring to different BLDC commutation methods.

    Standard block AKA trap commutation typically only switches 4 MOSFETs at a time. The other phase remains high-Z.

    Sinusoidal or FOC commutation will switch all 6 generally.

  • Ah - ok, makes sense. Thanks!
  • Hi Nick -

    I've read through your application note - very helpful indeed! I've used the calculations there to determine the approximate rise and fall times of the MOSFET i'm looking at (RFS7434-7PPbF):

    RFS7434-7PPbF (Qgd: 66 nC)

    DRV8305 (1.25A Isink, 1.0A Isource)

    Rise time: 66 nC / 1000 = 0.66 = 66 ns


    Fall time: 66 nC / 1250 = 0.528 = 53ns

     

    Both of these calculated estimates are below the spec in the RFS7434-7PPbF data sheet (125 ns and 85 ns for rise time and fall time, respectively)

    Since my calculated estimates, which take into account the driver sink/source capability - are lower than the actual data sheet specs, is this a sign that its OK to use this MOSFET?

    Thanks Nick/Ti Motor team!

    -asifjahmed

    Link to RFS7434-7PPbF datasheet: www.irf.com/.../irfs7434-7ppbf.pdf

  • The MOSFET specification just shows the rise and falls times under a given test condition. It is not a requirement but an informational spec.

    Rg = 2.6 Ohm, Vgs = 10 V

    At most this setup can source/sink ~384mA to the gate, so it make sense that the rise and fall times are slower with the lower current source/sink.

    Whether or not you can switch the MOSFET this fast will depend more on your application, voltage level, parasitics in the PCB design, peak current levels, etc.

  • Thanks, Nick! You're a wealth of knowledge on these things :-)

    I understand now what you just explained. So as long as my real-world conditions result in the MOSFET not exceeding the source/sink capability of the driver, I should be ok?

    I know that there are so many more aspects of this I should be looking at.... Do you have any more handy-dandy application notes on this topic?

    -asifjahmed
  • The gate driver will limit its current output if the load attempted to draw more than it is capable of. It has an output impedance that would limit the source/sink current.

    The real world conditions limit how fast the MOSFET can be switched. Ideally, the rise time and fall time would be 0 to remove switching losses. Realistically this cannot happen. First, the gate driver has a limit. Second, parasitic effects from switching rapidly.

    Unfortunately, that is all the material I have readily available. There is much more on the web. I recommend doing a general search for "MOSFET switch-node ringing", "dv/dt coupling",  "MOSFET reverse breakdown", "MOSFET reverse and forward diode recovery" to name a few.

  • Much appreciated Nick.
  • Hi Nick -

    Upon further review, I think you may have meant that the aforementioned setup (Rg=2.6 Ohm, Vgs = 10 V) could source/sink ~3.84A to the gate, as opposed to 384mA. Am I mistaken?

    -asifjahmed

  • Hi Asif,

    You are correct, my mistake. 

    This is only for the peak possible current from the driver. The gate driver and MOSFET gate will both have a varying impedance as the charge is deliver and the MOSFET moves through it's different regions.