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DRV8301 Over-current protection suitable for inrush-current limiting?

Guy Ovadia
Intellectual 400 points
Other Parts Discussed in Thread: DRV8301, DRV8301-69M-KIT

Hello,

short background first:
we are developing a linear (reciprocating) pump motor, and the driver is based on DRV8301. It's currently operational using the DRV8301-69M-KIT EVM.

In the next version of the motor design, it will have a lower winding resistance and a rather high ratio of operating current to stall / inrush current:

rated voltage: 60V (max)

rated current: 12A (typical)

winding resistance (phase-to-phase): 0.67 Ohm

stall current ( = max voltage / resistance): ~90A (!)

I am worried about the inrush currents, especially since they happen very often: it's a linear motor rather than a normal rotary motor, so it changes direction more than 10 times per second. on each direction change, I expect that the current will go up to 90A if not regulated or limited somehow. I don't want to design the power stage to these high current levels, it is unnecessarily expensive for the task, and the repetitive stresses of 90A current aren't good for the reliability of the product.

now to get to the point:

I am considering using the Vds sensing based over-current protection of the DRV8301 for limiting the current, like a chopper circuit. The OC protection will be of course set to current-limit mode rather than latched fault mode. preliminary testing in the lab show it seems to be working, however I have some questions / worries:

1. is it a good idea, generally? it seems the datasheet cares to mention multiple times that the OC protection is not meant for current-regulation. However, if it's merely an issue of accuracy, then I don't mind the 20% threshold spread they warn about - I'm OK with the limit being anywhere between 20A and 30A.
 are there reasons other than accuracy of why it's not recommended in the datasheet? and if current-limiting is really not recommended, why does the OC protection even has this mode...?

2. Since at any one time, 2 transistors out of the 6 are conducting, either / both can trigger the OC feature of the DRV8301. Do I have any way to control which does? can I count on both transistors getting turned off, or will it be random? I am worried about the recirculating current path and its implications.

3. how sensitive is the protection circuit to short spikes? is there any way to add filtering (and where)? I think that with good transistors (low Rds_on), my Vds threshold will be quite low, certainly at the lower end of the range the DRV8301 provides, so even small amplitude noises can pass the threshold.

thanks in advance,

Guy.

  • 0
    TI__Mastermind 26065 points
    Hi Guy,

    We normally don't let the start/stall current as it is, as most BLDC could have very small coil resistor, even as low as some mohm level. So we need current regulation close loop in our design. What I see from your discription is that you just need this current regulation stage. But Vds sense is designed for over current protection. The main difference is the regulation accuracy. The Rdson/Vds sense can't be as accurate as sensing from Rsense. So, it is recommended to use external low side Rsense to do the current regulation. The current control loop is done with Rsense, Opamp, ADC, and PWM control from the MCU. Actually our DRV8301-69M kit is already including all this hardware and software.

    Best regards,
  • 0 in reply to Wilson Zuo
    Intellectual 400 points
    Hi,

    thanks for the quick answer. I am aware of the option to do a full closed current-loop, however I don't think it's needed in my case. during most of the travel, the back-EMF limits the current to safe levels, so I'm just going with 100% PWM (in other words, full power). I just need protection from inrush during direction change (or during a stall event). Therefore, I am looking for something simpler, very much like the chopper circuit implemented in most stepper-motor drivers.

    can this be done with the OC feature in the DRV8301? referring to my specific concerns raised in my original post.

    thanks,
    Guy.
  • 0
    TI__Mastermind 21320 points

    Hi Guy,

    This feature was designed into the DRV8301 for this purpose (loose current regulation). Main issues are with accuracy of the monitor, noise causing false trips, and MOSFET Rds(on) varying with temperature.

    You are correct, either MOSFET in the current path could trip the over current. There is not a way to control this. Whichever monitor trips will be the MOSFET that gets disabled. What is the concern on the recirculation path? You will basically have either low-side or high-side recirculation during the OFF period depending on which MOSFET trips (opposite body diode will conduct along with MOSFET that remains on).

    The DRV8301 has an approximately 500 ns blanking time and 500 ns deglitch for the VDS monitors. VDS threshold for +/- 20% is 0.125 V to 2.4. Settings below 0.125 V can fall outside this accuracy. What is the RDS(on) you are looking at?

    The biggest concerns will be PCB layout and management of ringing/voltage transients on the switch node. These are typically the leading contributors to false trips. One key point is that the high-side sense is done between PVDD1 and SH_X. Ensuring a low-impedance and sudo-differential connection with SH_X from PVDD1 to the HS MOSFET drain will be important.

  • 0 in reply to Nicholas Oborny
    Intellectual 400 points
    Hi Nick,

    thank you for the detailed answer. it does address some of my concerns. I do have a few more questions / clarifications needed please:

    regarding the threshold: I will be using 5 mOhm transistors, and aim for around 25A. this puts me right at the lowest threshold you specified. I also saw that number (0.125V) as the minimum value in the specifications table in the datasheet; however, looking at the actual programmable threshold table in the registers description (pg. 24 of the datasheet) I see 7 options below this number, all the way down to 0.06V... so which is correct? is operation under 0.125V threshold problematic in some way?

    regarding the recirculating current: I think that high-side or low-side recirculation is OK; however, if both transistors turn off, if I understand correctly, the current will recirculate through two body diodes and all the way back through the supply (I think it's called asynchronous recirculation? not sure what would be the implications of that). is that case actually possible, of the OC protection shutting off BOTH transistors?

    about the timing: I thought the blanking is 1.5us? the relevant timing-related parameter in the datasheet specs, OC section, is "OC sensing response time", Toc, which is 1.5us. is it something else? also, blanking I understand (the transistor may be in the process of turning on or off so it's Vds is not down to the nominal level yet) however what is deglitch in that context? if blanking is only 500ns, does that mean that slower transistor turn-on or turn-off times will trigger the OC feature?

    thanks for the layout tips, I'll try to follow them, I'm actually in the process of designing our custom driver board (been using an EVM before) so that's good info.

    best regards,
    Guy.
  • 0 in reply to Guy Ovadia
    TI__Mastermind 21320 points

    The thresholds below 0.125 are functional but we cannot make any statement with regards to the accuracy of the threshold.

    In theory, only one MOSFET should disable (the one in which over current is first detected). The current would begin to decay after this point preventing over current in the other MOSFET from being triggered. Although current is equivalent their will be small variations in the trip point of each monitor and Rds(on) of the MOSFETs.

    If both MOSFETs disabled current would flow back into the supply through the body-diodes. Depending on the power supply and bulk capacitance you may see some voltage increase on the rail due to this effect. Many system are designed to tolerate this regardless in case of hard fault, loss of power, etc.

    OC response time is how long it takes the IC to report the over current condition. Fault registered til present on nOCTW or nFAULT pin. I agree that this is not clear currently.

    Correct, blanking is delay from the input edge to prevent false trips due to the transistor turning ON/OFF. Deglitch is a filter on the VDS input to stop transient noise on the half-bridges from causing false trips.

  • 0 in reply to Nicholas Oborny
    Intellectual 400 points
    thanks, that answers all the points I raised.

    I have one last related question: if the voltage to the DRV8301 drops below a certain level, it will reset and the current-limit threshold I set will go back to power-on default (which is outside my useful range). In my application (solar powered pump), relatively frequent power drops are to be expected (e.g. cloud passing) so such a reset will probably not be a rare event. furthermore, I don't think there is a guarantee that my MCU (powered by the regulator that is internal to the DRV8301) will reset at the same time, so I can't count on my normal initialization routines to run.

    The question is, therefore, how can I monitor for a reset so I can make sure the registers did not inadvertently set themselves to improper power-on values? I can just monitor Vdd but I don't feel it's the most reliable way. Do you have any other suggestions? I can also just continuously read and re-read all the registers, but I think that's a bit cumbersome, no?

    p.s.
    I also remember an appnote about the DRV8301 that describes just this phenomena, of inadvertent resets setting the registers to power-on values, and that's not even because of a falling external supply voltage but just because the layout was sub-optimal. This just strengthens my thought that monitoring Vdd as an indicator for reset is not the best approach.
  • 0 in reply to Guy Ovadia
    TI__Mastermind 21320 points

    You are correct that the buck regulator (MIN 3.5 V) may continue to operate while the gate driver is reset (MIN 6 V). The DRV8301 will assert nFAULT in a UVLO condition. It will hold nFAULT low as long as the internal digital logic is active. You can use this to determine if the DRV8301 hits under voltage and the MCU did not.

    You could also set the ENABLE voltage for the buck regulator to be above the minimum operating voltage for the DRV8301. That way the MCU would reset before the registers.

    As you mentioned, the other method is poll or check the DRV8301 registers before motor startup.

    Concerning the reset issue. This is related to improper routing of the DVDD bypass capacitor. Ensure a minimal bypass loop from DVDD to the GND of the DRV8301 (PowerPAD).

    www.ti.com/.../slva552.pdf

  • 0 in reply to Nicholas Oborny
    Intellectual 400 points

    that's excellent information, thanks!