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DRV8308 Lock issue

Patrick Chen
Mastermind 8875 points
Other Parts Discussed in Thread: DRV8308

Hello,

             Customer use register mode and it can spin the motor and will let speed LOCKn to low. But when use clock mode of drv8308, it can not let LOCKn  to low but fCLKIN and FGOUT  are most the same frequency. What is the issue root cause?  

             Question 2, while use register mode, the ENL_180 of 120 communication can let LOCKn to low. But while speed fixed and change to 180 communication, the LOCKn is not stable. Has any problem? Thank you. 

  • 0
    TI__Mastermind 26065 points
    Hi Patrick

    Is the motor still running smooth when nLOCK is not stable when using Sine and Clock mode?

    when the close loop of clock mode is well tuned. We should see the motor speed/FG just exactly the same as the Clock input.

    Maybe it will better to give a waveform including the phase current and nLOCK signal.

    Best regards,
  • 0
    TI__Mastermind 20985 points
    Patrick, when using 180 sine mode, please be sure to set MOD120 = 3970.

    LOCKn should go low when the motor reaches a consistent speed, unless MINSPD, SPEEDTH, or SPDREVS is incorrect. Try using the default GUI values of MINSPD=180, SPEEDTH=6 (12.5%), SPDREVS=3.

    Best regards,
    RE
  • 0 in reply to RE
    Mastermind 8875 points

    Hello,

                   Reply below questions. 

    > Is the motor still running smooth when nLOCK is not stable when using Sine and Clock mode?

     

    No. When using Sine and Clock mode, motor is running roughly. 

    Summarize as below. 

    SPDMODE：Internal Register PWM mode

    MINSPD：180

    SPDREVS：3

    SPEEDTH：1/8 rev (12.5 %)

    MOD120：3970

    When EN_180 is disalbed, motor is stable and LOCKn keeps LOW：

    When EN_180 is enabled，motor is unstable：

    When use clock mode:

     

    Input frequency：48MHz

     

    SPDMODE：Clock Frequency Mode

    AG_SETPT：48Hz

    AA_SETPT：48Hz

    SPDREVS：2

    MINSPD：14

    SPEEDTH：1/16 rev (6.25%)

    MOD120：3970

    LOOPGAIN：400

    SPEED：4000

    FILK1：210

    FILK2：168

    COMPK1：797

    COMPK2：843

    INTCLK：0.4 MHz

    SPDGAIN：1

    After some time, LOCKn is disappear as below waveform. What is the root cause for it? Thank you. 

    BR

    Patrick

              

  • 0 in reply to Patrick Chen
    TI__Mastermind 26065 points
    Hi Patrick,

    First we need to make sure the motor running in 180 open loop smoothly with PWM or internal speed reg control. I will recommand you try to set HALLPOL to a opposite value and redo the advance time setting tuning until a very smooth SINE operation. I have seen some unstable issue for some motor which the Hall inputs or HALLPOL must be set to one special value even it can run smoothly at 120 driving mode.

    After that you can switch to CLOCK mode (speed close loop), It will be important to set proper AG_SETPT, SPDGAIN, LOOPGAIN, and SPEED. SPEED should be able to set to its MAX 4096 if everything is fine. Also please use HALL U as FG. After well tuned, the target FG output and CLOCK input should be the same with almost < 0.5 Hz at your speed range. Right now I don't think you speed loop is stable since the error is too much of 42.37 vs 48.

    Best regards,