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DRV8701E Question

Wei Meng Ooi
Prodigy 70 points


Hi,

FAULT:

I am currently using DRV8701E in my application. I found that the FAULT line asserted when I first enabling the driver through SLEEP pin. Same thing happen when the driver is disabled. Is this an expected behavior?

VREF

AVDD of this driver has very loose voltage range. So the current chopping range will be loose as well if the VREF is reference to AVDD. Can I use external supply which has better tolerance as the reference voltage for VREF to achieve better accuracy?  

  • 0
    TI__Mastermind 26065 points

    Hi Wei Meng

    For the nFault, is it a latched one? If not, it could be the UVLO in the waking transent and that is normal.

    For Vref, it can be connected to external reference.

    Best regards,

  • 0 in reply to Wilson Zuo
    Prodigy 70 points

    Hi Wilson,

    nFAULT and SLEEP :

    Sorry for late reply. The nFAULT goes low for around 10ms when we first activated the IC through SLEEP pin. It happen every time. As for turning OFF, again the nFAULT went low for around 1ms at the moment SLEEP line is bring low. Attached is the waveform captured. The nFAULT line looks rounded off in the plot is because we added capacitor to extended the pulse so that our software is able to capture the fault.

    SHx:

    1. What is the pull-down / leakage current to ground at SHx node when ENABLE line is inactive ?

    2. Can I put a bias voltage on SHx node before IC is enabled (ENABLE = 1)?

    For example: The driver is powered by 24V, and having 20k-20kohm voltage divider to bias the SHx to 12V in order to detect open load on the other leg of the H-bridge.

    nFAULT vs SLEEP.tif

  • 0 in reply to Wei Meng Ooi
    TI__Mastermind 26065 points
    Hi Wei Meng,

    The nFAULT may reflecting the charge pump under voltage during in and out SLEEP mode. That will be normal and you can ignore it.

    SHx should be high Z if ENABLE line is inactive, the leakage is at several us level. also it will be final to connected to a voltage divider with k ohm level resistance.

    Best regards,
  • 0 in reply to Wilson Zuo
    Prodigy 70 points

    Hi Wilson,

    I measured about 10mA leakage per H-bridge leg before IC is enabled. Is this normal?