This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8432 in dual parallel mode used as a DC TEC Driver

Hello,

I am using the DRV8432 set to parallel mode as a TEC driver.  Rather than using PWM to control TEC drive, we are varying the input voltage (PVDD).  The PWMA and PWMB inputs are used to flip the polarity of the TEC from heating to cooling.  I am seeing some odd behavior from the DRV8432, in that after a few seconds of operation, the output will start to pulse.  It won't go completely off, though - if, for example, I am supplying 24V, the output will switch between 24V and 5V at anywhere from a 0.5-3Hz rate.  There are no fault indications (pins 2 and 3 are high), and the PWM and reset control inputs are steady.  Temperature is not an issue - the heatsinks attached to the DRV8432 are maybe 10C above ambient.  

Is there an issue with using the DRV8432 as a straight DC driver?  My intended application is to switch the polarity across the TEC with a variable drive voltage of 0-24VDC.  I understand that there will be some short pulses on the output as the bootstrap caps are charged, but I would think that that would be barely perceptible - not the slow pulsing I am seeing.

Any thoughts?

Thanks!!

-Mike

  • Hi Mike,

    How much current is the device sourcing when this happens? What size bulk capacitors are you using with this driver?
  • Hi Phil,

    The TEC string is drawing about 2A.  Bulk cap of 47uF on the GVDD lines (one cap shared among all lines).  No bulk cap on the PVDD lines (didn't think it was required due to the straight DC load).  PDF of the schematic is attached below.

    Thanks!

    -Mike

    Sheet7.pdf

  • Hi Mike,

    I would recommend adding bulk capacitance to the PVDD line. If you probe the PVDD net during operation do you see the voltage supply sag significantly?
  • Hi Mike,

    Is it possible to change the PWM input such that there is a 50ns low pulse every 100us (99.95% duty cycle)? This should replenish the bootstrap cap without relying on the device bootstrap recharge sequence. If the recharge sequence is still initiated, the value of the bootstrap cap could be reduced. This will help for the comment below.

    Also, please note the second paragraph of section 7.3.2.1 Bootstrap Capacitor Undervoltage Protection. Some of the capacitors used are larger than the recommended 220nF. It is recommended to add a 5 Ohm series resistor in series as described in the datasheet.
  • Thanks - this, along with adding some input bulk capacitance, seems to have solved the issue. Now, I just need to find a spot to put all those big caps...

    Thanks again,

    -Mike