DRV110 PWM Signal - FET not coming fully on every time

Hi Jordan,

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Hello Jordan,

Could you try removing R8 and testing it again, and let us know what the output is.

Regards,

Ramon

Upon removal of R8, this is the oscilloscope signal from the output side of the driver.

Jordan,

In the scope shots in your original post, what signals are the blue and yellow lines showing?

Try removing R7 and drive the gate of the FET directly from OUT. I think the slewing you are seeing on the OUT pin may be due to the RC on the gate. If you see ringing on the gate, then add a smaller resistance back (~100 ohm).

James,

In the signal pictures, the yellow represents the output before the filter and the blue represents the output after the filter. I tried removing R7 and directly drove the FET from the OUT pin and it caused the FET to never turn fully on. Replacing them, and changing the from a 100p to a 100n helped me obtain the desired hold current however, the signal is only "good" every other period. Since I am getting the desired current now, I see that as progress. However, I am still unsure as to why the signal is not uniform over every period like is expected

Jordan,

The PWM output will sometimes have a varying PWM signal. The following explanation on page 8 of the datasheet describes this performance.

"The current control loop regulates, cycle-by-cycle, the solenoid current by sensing voltage at the SENSE pin and controlling the external switching device gate through the OUT pin. During the ON-cycle, the OUT pin voltage is driven and kept high (equal to VIN voltage) allowing current to flow through the external switch as long as the voltage at the SENSE pin is less than VREF. As soon as the voltage at the SENSE pin is above VREF, the OUT pin voltage is immediately driven and kept low until the next ON-cycle is triggered by the internal PWM clock signal. In the beginning of each ON-cycle, the OUT pin voltage is driven and kept high for at least the time determined by the minimum PWM signal duty cycle, DMIN."

Another explanation I've heard is below.

"The DRV110 can only sense when the FET is on so it uses the internal clock (aka “PWM generator”) to turn on the FET with the period set by the OSC pin. If it is above the required voltage it turns right back off, otherwise it stays on until it crosses the high side of the hysteresis (which can take many clock periods or not, depending on the inductance). Hence the long on, short on, long on, short on. "

Try increasing your capacitance or resistance of the filter on the SENSE pin and see if it makes your PWM signal more consistent.