This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8301 - SPI Register Report "FAULT"

Other Parts Discussed in Thread: DRV8301

I am attempting to drive a sensorless BLDC motor using BEMF control.  I'm fairly early in the development cycle and am currently trying to determine the proper settings to use in order to ramp the motor up to a speed at which we can transition over to BEMF control.  Quite often, when I try to transition from the alignment phase to the ramp phase, the DRV8301 reports a fault at the nFault pin as well as "FAULT" in status register 1.  No other fault bits are set in status register 1, and status register 2 has a value of 0x01 (just the device ID).

What does only the "FAULT" bit set in Status Register 1 indicate?  Could this have something to do with detection of overcurrent through the FETs?  I am not currently monitoring the OCTW pin in interrupt, just through polling, so if it is getting asserted for a brief time I could be missing it.  

  • Hi Henry,

    Yes you are correct, the Fault bit in status register 1 could be set when an overcurrent condition occurs through the FETs. Which overcurrent mode do you have the OC_MODE bits configured for. If you set the overcurrent mode to "report only" then there won't be any overcurrent protective actions but you will have it reporting on the nOCTW pin and also the SPI register. What value do you currently have stored in control register 1 for the gate driver control(address 0x02)?

  • With these settings:
    Drv8301 Control Reg 1: 0x0290 (current limit at ~200mA)
    Drv8301 Control Reg 2: 0x0008

    I was getting the FAULT condition

    I've changed to these settings:
    Drv8301 Control Reg 1: 0x07D0 (current limit at 2400mA)
    Drv8301 Control Reg 2: 0x0008

    and have stopped getting the FAULT conditions.

    Thank you for confirming the issue. I may still need to disable the current limit instead of just setting it at the maximum value as the device we're driving may require 10's of amps to start.
  • Yeah, if that is the case then having the maximum current limit set to the maximum 2400mA is probably not necessary. You will probably be better off just disabling the overcurrent limit. If you have any further questions please feel free to reach out.
  • Hi Raymundo,

    I have a question about your first answer. You say when FAULT bit in status register 1 is set, this could be due to an overcurrent through the FETs, but any of FET overcurrent bits (D0…D5) were set, why not?

    Moreover, Could you explain when the FAULT bit is set? (overcurrent, overvoltage, overtemperature,…). I hope that when FAULT bit would be set, one of the others would be set too (in the sense that FAULT bit works as overall fault indicator, I mean the same as nFAULT).

    Thank you in advance.

  • Hi Masky,

    The overcurrent protection monitors the Vds voltage of the FETs such that it compares the value to that stored in OC_ADJ_SET register value. If Vds exceeds this value stored in the register then the overcurrent protection mode of response is initiated based on the OCP_MODE. The various methods of reporting are explained on page 17 and 18 of the DRV8301 datasheet. Keep in mind that there is a 20% tolerance across channels for the Vds trip points and that Rds varies with temperature.


    -Raymundo Hernandez-Toscano

  • Hi Raymundo,

    first of all thank you for your quick answer. Only to clarify, you mean that FAULT bit on status register 1 is the same as OC (based on the OCP_MODE), is it?

    Many thanks again.

  • Hi Masky,

    Yes, although the FAULT bit in status register 1 is an overall fault reporting register for the nFAULT pin assertion. Depending on the OCP_MODE the reporting structure is different. Also, Table 5. in the DRV8301 datasheet provides a summary of all protection features and their reporting structure.

    -Raymundo Hernandez-Toscano