DRV8313: About minimum value of UVLO and behavior of V3P3 regulator

Hi Kanemaru-san,

hideto kanemaru said:

[Q1]

Could you please let us know the minimum value of UVLO(VULO_min) if you have any information?

*This value does not need to be a guarantee.

Min Vvulo is 5.9V

hideto kanemaru said:

[Q2]

I understand that “V3P3 regulator” is enabled if VM is more than the VULO_min.

So, my understanding is as follows.

-V3P3 regulator is disabled if UVLO_min ＞ VM

-V3P3 regulator is enabled if UVLO_min ≦ VM

Is my understanding correct?

We will check this and reply soon.

Hi Rick-san,

Thank you for your prompt reply.

I’m looking forward to hearing from you.

Regards,

Kanemaru

Hi Rick-san,

I am sorry for bothering you again.

Would you tell me about the progress on this matter?

I’m looking forward to hearing from you.

Regards,

Kanemaru

Hi Rick-san,

Thank you for your prompt reply.

I will report this information to our customer.

Regards,

Kanemaru

Hi Rich-san,

Thank you for the information.

I have additional questions.

I understand that V3P3 regulator is disabled if nRESET pin is LOW.

Is my understanding incorrect?

Regards,

Kanemaru

Hi Kanemaru-san,

The V3P3 regulator is enabled if nRESET pin is LOW.

Hi Rich-san,

Our customer applied 12V to VM pin at nRESET and nSLEEP pin is Low.

Then, V3P3 output voltage is 0V.

Therefore, we understand that V3P3 regulator is disabled at nSLEEP pin is Low.

Is this understanding mistaken?

Regards,

Kanemaru

Hi Rick-san,

Thank you for the information.

I have one more question.

I understand that V3P3 output voltage is less than 3.3V if “nRESET and nSLEEP pin is open(so internal pull down)”, “Around 1V is applied to VM pin”.

Is my understanding incorrect?

Regards,

Kanemaru

Hi Rick-san,

Thank you for information.

I undersntad. Thank you very much.

Regards,

Kanemaru