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DRV8823: Can't make DRV8823 to start

Part Number: DRV8823

We run a project where we use DRV8823 to control a solenoid.

 All the relevant SPI signals look perfect

RESET is high

Sleep is high

Control word: 0x001D, sent LSB first.

Rsense = 2.49Ω, Vref 3.00V

Still no 24V at the outputs. (A1 or A2)   

Any idea what the problem?  AC_DC.pdf

  • Hi Yehuda,


    What have you done with SSTB? Did you toggle SSTB after the SPI transaction or tie the pin high?

    Can you provide a scope capture of the full SPI transaction?

    Other questions:
    What size bulk cap doe you have on the board?
    What is the V3P3D voltage?
    What is the charge pump voltage?
    Have you tried running without the load on the outputs? Was the voltage correct?
  • Hi Rick, thanks for the prompt reply.

    SSTB is toggled positive after the 16 clocks, before SCS goes low.

    I will get a scope capture later and post here.

    What size bulk cap doe you have on the board? - don't understand, please clarify.

    V3P3D : 3.3V actually not connected.

    VCAP = 36V

    CP1 = 0.3V

    CP2 = 23.8V

    I tried with and without load, same results -> no voltage on output pins.

  • Hi Yehuda,

    V3P3 pin is an internal LDO and uses a recommended .47uF capacitor to ground. Please change the capacitor to the recommended value.

    Typically, there is a large bulk cap (>10uF on the PCB). The value of this cap depends on the current. Please refer to section 9 of the datasheet for details.

    Please try writing 0xFFF0 and 0xFFF8. This should enable all 4 output pairs with xOUT1 high and xOUT2 low. If this works, further debug can continue.
  •  Hi Rick,

    We are not using the V3P3. 1uF is not very different from .47uF...

    We do have 50uF bulk cap on the board.

    As you asked I tried writing 0xFFF0 and 0xFFF8. Still no results on all channels.

    I'm attaching a scope capture. Clock rate is 8MHz.

  • Hi Yehuda,

    The sequence is correct. The EVM uses a similar sequence although the clock frequency is slightly faster.

    There are a couple of other items to check.
    Are you sure the pins of the DRV8823 are receiving the signals?
    Can you zoom in on the clock pin, and look for possible noise on the edges? This can cause the data to be shifted.
  • Hi Rick,

    Yes the pins of the DRV8823 are receiving the signals...

    Yes I already zoomed into the signals, no glitch found...

    Can it be a faulty series?  The chips are marked 32ARG4TC.

  • Hi Rick,

    I have also noticed that RESET has no effect on the charge pump. On the other hand, SLEEP "low" dose stop the charge pump...

  • Hi Yehuda,

    Have you seen this behavior on multiple parts/boards? It is unlikely that the series is faulty.

    Have you confirmed the outputs with a scope? If one of the protection circuits have activated, the outputs will be disabled according to section 7.4.5 of the datasheet.

    Setting SLEEPn low will disable the charge pump.
  • Hi Rick,

    I can confirm same behavior on several board each containing 4 chips!
    I have also confirmed the output with a scope...

    Setting SLEEPn low will disable the charge pump. - I couldn't find this statement in the datasheet.
    RESET has no effect on the charge pump.
  • Hello Rick,

    Hope this Email finds you well.

    We spoke with the customer and it seems that they were able to find the causing factor to the issue they mentioned. They removed the 8 diodes in the output (D55-D62) - SMBJ15A (which are rated to 15V and actually mounted in the output to protect the device against lightning stickers). Now the design is working but they don't have the desired protection. Do you have any recommendation for us to implement here?

    Regards,

    Meir.

  • Hi Meir,

    Sorry I missed the zener rating was 15V and VM was 24V. This will cause an OCP event.

    Will the SMBJ26 work as an alternative?