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DRV8703-Q1: About resetting the configuration registers when coming out of exiting sleep mode

Part Number: DRV8703-Q1

Dear Support team,

Our customer will use DRV8703-Q1 in their application. 

Please answer the questions from them.

In "7.4 Device Functional Modes" on page 38 of the data sheet, it is explained as follows:
"On the DRV8703-Q1 device, the SPI settings are reset when coming out of UVLO or exiting sleep mode."

Questions
1) Although it is stated that SPI settings are reset when returning the device from sleep mode, is it possible to set up to prevent this reset?

2) Lock Register is described on page 42 of the datasheet. (Main Control Register)
   Is it possible to protect the SPI setting by returning from the sleep mode by using this lock function?

Best Regards,
Hiroaki Masumoto

  • Hi Masumoto-san,

    Hiroaki Masumoto said:

    1) Although it is stated that SPI settings are reset when returning the device from sleep mode, is it possible to set up to prevent this reset?

    It is not possible. When exiting sleep mode, the SPI is reset. To maintain the SPI settings, the device would have to remain awake. 

    Hiroaki Masumoto said:
    2) Lock Register is described on page 42 of the datasheet. (Main Control Register)
       Is it possible to protect the SPI setting by returning from the sleep mode by using this lock function?

    This is not possible either. The SPI is reset when exiting sleep mode.

  • Hi Duncan-san,

    Thank you for your help.
    I understand the contents of the reply.
    I will inform this information to customers.

    Regards,
    Hiroaki Masumoto