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DRV8301: FAULT and OCTW don't report error

Pierre Bourg
Prodigy 30 points
Part Number: DRV8301

Dear support,
We use your driver DRV8301 (only 2 phases) to control 4 N-channel mosfets, connected to a 800W DC motor.
During tests with motor+load, the driver latches up and puts H-bridge in 'Z' state. A reading of status register 1 shows 0x18, which means that 'FETLA_OC' and 'FETHB_OC' flags trigger.
Given that the driver completely latches up and according to your datasheet, we suspect that an "External FET overload – Latch mode" event appears.
But the problem is that neither FAULT_PIN nor OCTW_PIN reports this errror whereas it should be for this kind trouble.
How is it possible that FAULT and OCTW pins stay high?
Thank you in advance.

Regards,

Pierre B

  • 0
    TI__Guru** 114905 points
    Hi Pierre,

    Can you rule out a few items?

    Are you using current limit mode?

    From the datasheet:
    In current limit mode the device uses current limiting instead of device shutdown during an overcurrent event.
    In this mode the device reports overcurrent events through the nOCTW pin. The nOCTW pin will be held low
    for a maximum 64-µs period (internal timer) or until the next PWM cycle. If another overcurrent event is
    triggered from another MOSFET, during a previous overcurrent event, the reporting will continue for another
    64-µs period (internal timer will restart) or until both PWM signals cycle. The associated status bit will be
    asserted for the MOSFET in which the overcurrent was detected.

    Are you using EN_GATE reset pulses or is it possible there could be noise on EN_GATE?

    From the datasheet:
    An EN_GATE reset pulse (high → low → high) from 10 to 20 µs should not be applied to the EN_GATE pin. The
    DRV8301 has a transition area from the quick to full reset modes that can cause the device to become
    unresponsive to external inputs until a full power cycle. An RC filter can be added externally to the pin if reset
    pulses with this period are expected to occur on the EN_GATE pin.

    Have you confirmed that this is not an issue?
  • 0 in reply to Rick Duncan
    Prodigy 30 points

    Hi Rick,
    Thanks for your feedback.
    I confirm that we use current limit mode.
    We do not use EN reset pulse; this pin is only tied high during init. EN_gate is directly connected to a µC.

    A strange behaviour appears when we try to re-start the motor after a latchup driver.
    Iif we try to send a pwm command different from 0 nothing happens.
    But if we send a 0 and after any different value the motor starts again; like if this 0% PWM command resets everything.
    We do not do anything else...

    Regards,
    Pierre B

  • 0 in reply to Pierre Bourg
    TI__Guru** 114905 points
    Hi Pierre,

    This appears to be consistent with the current limit mode description.

    Have you examined nOCTW during this event?
    If you are seeing nOCTW asserting, cycle the PWM inputs.
  • 0 in reply to Rick Duncan
    Prodigy 30 points
    Hi Rick,
    Thanks for your answer.
    We examine nOCTW pin but our software runs at 400µs, therefore if the pin is asserted during 64µs max we can not detect it.
    We are going to modify it.

    What do you mean by "cycle the PWM inputs" ?

    Regards,
    Pierre B