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DRV8320: Volatile memory, frame pauses

Michael Balourdas
Expert 5455 points
Part Number: DRV8320
Other Parts Discussed in Thread: DRV832X

Hi, I have a customer with the following questions:

Starting to write some code for the DRV832x and have some questions on the SPI registers.

When I write to the part is this all stored in volatile memory.  So every time I power up the driver I need to write all of the registers?

In the data sheet section 8.5 talks about using a 16 bit frame.  My SPI master is built on 8 bit resistors.  So I need to send out 2 8bit sections that will have a slight pause in between.  If I keep the chip select and clock in the proper states during this pause will this cause an issue in the part?  I presume the answer is it will be acceptable since the SPI interface does not specific a minimum frequency and can be almost 0Hz.  I will be operating at 1MHz but can slow down if needed.

 


Thanks,

Michael Balourdas

  • 0
    TI__Expert 4435 points

    Hello Michael,

    Please comments below, thank you.

    So every time I power up the driver I need to write all of the registers?

    Luis: Yes the driver's map register needs to be written everytime it powers up.

    If I keep the chip select and clock in the proper states during this pause will this cause an issue in the part?

    Luis: How long of a pause would this be? I want to say that this should be okay but for proper SPI communication a FULL 16 SCLK cycles must occur for the transaction to be valid.

    I will be operating at 1MHz but can slow down if needed.

    Luis: 1MHz is okay.