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DRV8846: Which control pins are gated by the STEP signal?

Part Number: DRV8846

Hello;

I need to control 3 very different stepper motors from the same processor and am trying to figure out which control pins can be shared among the three DRV8846's.  I only run one motor at a time but all motors must implement a "Hold" mode where a reduced current is applied to hold the motor position at the proper microstep.  nENABLE pin must be low for all three motors all of the time to implement the "Hold" mode.

Which of the following control pins will affect motor driver outputs in the absence of any STEP transitions?:

ADEC

DEC[1:0]

DIR

I[1:0]

M[1:0]

TOFF

There is a specification for timing from STEP to M[1:0] and DIR so I assume DIR and MODE will not change until a STEP transition.  What about the others?

P.S.  Sorry if this double posts.  I tried to post this question a while ago and got the spinning wheel.  Closed the window and went to the forum and it was not there.  So I reposted.