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DRV8301: Dead-time behavior

Part Number: DRV8301

Hi,

I'd like to know in which state are the mosfet gate drive outputs on the DRV8301 during dead-time.

On the oscillograms I've recorded, it seems to be an open drain output, please would you mind confirming this?

Thank you

Best regards

  • Hi Alexandre,

    I am not sure what you mean by an open drain output.

    During the dead time, both the high side (GH_x) and low side gate (GL_x) outputs are off.
    The low side output is connected to the SL_x pin to create 0V Vgs.
    The high side output is connected to the SH_x pin to create 0V Vgs.

    Please refer to the function block diagram for details.
  • Hi Rick,

    thank you for your answer.

    I thought it was the way you write it above, however as I try to understand the oscillograms, it seems that Vg signal doesn't go to 0V before the end of the dead-time.

    And so for a short time duration (around 100ns at ton and toff), there is a shoot-through between the high-side MOSFET and the low-side one.

    Please see the oscillograms in attached files.

    Channel 1 (yellow) is the high-side Vg signal, Channel 2 (blue) is the low-side one.

    My interpretation : when Vg (high-side MOS) goes low, the bootstrap capacitor (100nF) takes too much time to discharge (around 500ns).

    And when Vg (low-side MOS) goes low, I think the filter capacitors (C64, C67, C70, 1nF) on Rshunts are too high and create a long delay that prevents the voltage to go down fast.

    Also, I think I always had this problem, but before I had 10 ohms gate resistor values (please see the extract schematics in attached files) for R144/145, R147/148 and R154/155 so the shoot-through duration was really low (around 10ns).

    Now, for EMC reasons, I need to have higher gate resistor value, eg 82 ohms, so shoot-through duration is higher and the MOSFETs get warmer and warmer.

    Do you think I could lower the value of bootstrap capacitors and Rshunt filter capacitors?

    Attached_TI.docx


    Thank you,

    Best regards

  • Hi Alexandre,

    Have you tried adjusting the DTC resistor or increasing the dead time via the mcu?

    When increasing the gate resistor, the driver can interpret the FET as off before it actually is.

  • Hi Rick,
    yes I've put the DTC resistor to 150k, ie dead-time = 500ns. And I've tested with more dead-time by adding value with the piccolo.
    I've made experiments in order to reduce radiated emission, and if I put a dead-time superior to 600ns then electromagnetic noise level rises.
    So I consider 50ns as an optimized dead-time for my design.
    To my mind, the problem is that voltage gate takes too much time to decrease from 50V to 40V in order to make the MOSFET off. Why 500ns, it's really too long? However i tried to reduce the bootstrap capacitor from 100nF to 47nF and there is no change!
    Please have you got another idea for the reason of this slow decay phenomenon?
    Thank you
    Best regards