• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Subscribers 30 subscribers
  • Views 777 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

BOOSTXL-DRV8323RS: DRV832x datasheet clarifications

Ivan Cenov50
Prodigy 20 points
Part Number: BOOSTXL-DRV8323RS
Other Parts Discussed in Thread: DRV832X

Hi,

I am reading now DRV832x (SLVSDJ3B) datasheet and would like to ask a question to clarify 1x  PWM mode brake mode.

Section 8.3.1.1.3, page 30. The INLC pin, when pulled low enters DRV832x in brake mode by turning off all high-side MOSFETs and turning on all low-side MOSFETs.
Section 8.6.2.1, page 55, Driver control register. Brake mode is entered by setting bit 1 BRAKE to 1. Also it is said there that this bit is ORed with INLC.

It looks like the polarity of INLC pin and BRAKE bit is opposite, regarding OR function. Is the datasheet exact in these two points?

Another point for clarification, section 8,6.2.3, Gate Drive LS Register, CBC bit. There is no explicitly written what happens when CBC is set to 0 and whether it can be set to 0.

Regards,
Ivan


  • 0
    TI__Guru** 114905 points
    Hi Ivan,

    The functions are ORed together. If either INLC in 1x PWM is low or the BRAKE bit is set to 1, all high side MOSFETs are disabled and all low sid MOSFETs are enabled.

    We will have to research the CBC bit. We should have a reply by Thursday. Thank you for pointing this out.
  • 0 in reply to Rick Duncan
    TI__Guru** 114905 points
    Hi Ivan,

    For the CBC bit:

    When it is set to 1, the PWM input change will clear the OCP fault (only in retry OCP_MODE).
    When it is set to 0, the PWM input change will NOT clear the OCP fault.
    Default is 1

    Additional clarifications:

    The CBC bit only applies in retry OCP_MODE (OCP_MODE = 'b01). The OCP fault can not be cleared by PWM input change when OCP_MODE setting to the other mode (latch, report only, no action).

    The OCP fault will shutdown all bridges (PWM6x, PWM3x, PWM1x).
  • 0 in reply to Rick Duncan
    Prodigy 20 points

    Thank you!
    Have a nice day.

    Ivan