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DRV8703-Q1: Interface Questions

Richard Elmquist
Mastermind 45250 points
Part Number: DRV8703-Q1

My customer is asking the following questions concerning the DRV8703-Q1:

We will be using SPI to program the gains and thresholds. But initially we thought to make sure we drive the motor through hardwired signals.

So, the SPI pins are left open. The chip select is not used, and this is only used if we want to do the SPI comm.

The Vref pin we currently have it connected to 3.3V. Yes, we are operating in default mode.

With nSLEEP low, the voltage seen on SH1 and SH2 are 0V (mv range) as expected. But when nSLEEP is HIGH, the SH1 and SH2 are 0.747V. Same voltages observed at GH1 and GH2. But GL1 and GL2 are in mV range. When in Hi-Z, the voltages should be all 0V.

The data sheet does not provide details on how SH1/SH2 are used within the chip. Is the driver IC sourcing any voltage on these 2 pins, which in turn might feed back to GH1/GH2 ? The above voltages are seen when SH1/SH2 are not connected to our controller.

Now, if we connect our controller, then the voltages are little different because we have a ladder network for detecting off state faults on the load. This ladder network is pulled up with 12v, and if SH1/SH2 are Hi-Z, then I expect a voltage based on ladder network. But as the driver chip is sourcing some voltage we see much lower voltages.

What does TI's recommendation for off state diagnostics? I understand that the driver IC can detect the over current/temperature, but this could happen only if we drive the motor. We need to detect the faults before to inhibit driving the motor if there is fault detected (STG, STB or Open circuit). The ladder network helps doing this.

Can the customer use the ladder network that he is referring to? Is it normal to see voltages on SH1/SH2? This seems like a diode drop, but I cannot tell. This is the main reason for the questions.

Thanks for your help with this!

Richard Elmquist

  • 0
    TI__Genius 14487 points
    Hi Richard,

    If they are not using SPI, they should pull the chip select high. If the nSCS pin is left floating, the internal pulldown makes the pin go low which activates the SPI.

    The SHx pins connect to the switch node of the FETs on the bridge. Because the high-side FETs are NMOS, we have a charge pump to supply the FET gates. The SHx pins create the reference point from the FET source pin to turn on the FET gate. The SHx pins are also used for various diagnostics, such as overcurrent protection. The datasheet has multiple images showing where to connect the SHx pins and how the protection features use them.

    I believe there is a clamping diode on the SHx pin for protection purposes. If they have a resistor network there, they may be seeing the voltage of the diode from the current sourced into that pin.
  • 0 in reply to James Lockridge19
    TI__Mastermind 45250 points
    James,
    Thanks for your help!
    I will let you know if the customer has any further questions.
    Have a great day!
    Richard Elmquist
  • 0 in reply to Richard Elmquist
    TI__Mastermind 45250 points

    James,

    The customer is still seeing issues. Here is his explanation:

    I am fine with nSLEEP being LOW. I tried with this setup, but it does not work as expected.
    We have the ladder networks which are pulled up with 12V on both ends of the motor. So, when nSLEEP = LOW, then I expect the voltages on OUTx (SHx) based on the ladder network. For example, if SH1 and 2 are separately pulled up with 30k to 12V, and pulled down with 30k to ground. I should expect 6v at SH1 and SH2. But I see that when nSLEEP = LOW, the voltages are around 1V. So, it is still not Hi-Z, and TI driver is impacting even when nSLEEP = LOW.  
    If the ladder does not have any impact, then we cannot determine the faults on motor in off state or when nSLEEP=LOW.
    Is what he is seeing correct? Are the voltages correct as stated? Please explain so that I can explain this to the customer.
    Thanks for your help with this!
    Richard Elmquist
  • 0 in reply to Richard Elmquist
    TI__Genius 14487 points
    Hi Richard,

    I talked with our design team, and they gave me the simulation results for the leakage into the SHx pins (below).

    For active /HiZ mode:
    Typical 2mA, max 3.36mA

    For sleep mode:
    Typical 2.47mA, max 2.56mA

    In this customer's case, the pullup resistor is very large, so the amount of current that the SHx pin can pull is smaller than these values. This causes the leakage path to hold the voltage of the SHx pin at 1 V. The customer should design for a pullup resistor to allow ~4 mA to flow into the SHx pin, then size their resistors appropriately to achieve the voltage output they want from the resistor divider.
  • 0 in reply to James Lockridge19
    TI__Mastermind 45250 points
    James,
    Thanks so much for your help.
    I will let you know if the customer has any further questions.
    Have a great day!
    Richard Elmquist
  • 0 in reply to Richard Elmquist
    TI__Mastermind 45250 points

    James,


    The customer has an additional question:


    Another question, what is the leakage when the PVDD (Vp) is turned OFF, and nLSEEP is LOW with Mode pin either LOW or Hi-Z  ?


    Can we answer this question?


    Thanks for your help with this!


    Richard Elmquist

  • 0 in reply to Richard Elmquist
    TI__Genius 14487 points

    Hi Richard,

    Before I ask our design team to investigate this, can you ask the customer to verify that their implementation will not violate the Absolute Maximum spec for any of the pins on DRV8703-Q1? In particular, I'm considering the Abs Max value for the SH pins.

    If there is a short to VM while the chip is disconnected from VM, this will likely damage the IC. A short to GND while the VM is disconnected should be fine, so long as the Abs Max spec is not violated by any of the connected circuitry.

    If they still want me to investigate the leakage current question, can you also let me know what voltage they would expect on the SH pin (assuming it does not sink current when VM is disconnected)?

  • 0 in reply to James Lockridge19
    TI__Mastermind 45250 points
    James,
    I will talk with the customer and post his answers as soon as I can.
    Thanks for your help with this!
    Richard Elmquist