This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8432: Input pin capacitance

Part Number: DRV8432

Dear TI,

DRV8432.

1) What is the input capacitance of the pins: PWM_A through PWM_D: /RESET_AB and _CD?

2) please give the truth table for input PWM_x  v/s output high-side/low-side FET on/off

regards,

Basil

  • Hi Basil,

    The input capacitance is typically a few pF ( assume 10pF max )

    The truth table is described in section 7.4. Additional information is provided because cycle by cycle current mode affects operation.
  • Rick,
    Thanks for the info about the capacitance.
    The truth table as described in section 7.4 is unclear to me.
    I will be more specific; I plan to be using only mode 2 (OC shutdown, no CBC) in my application (dc motor driver). OC current will be set at about 10 Amps.
    Will the truth table in mode 2 look like this?
    Assuming /Reset_xx is logic 1 (3.3 volts).
    PWM_x   HighFET_x    LowFET_x
    ----------------------------------------------
    1              ON                OFF
    0              OFF                ON

    regards,
    Basil

  • Hi Basil,

    Yes, the truth table would look like you wrote with an additional clarification when PWM_x is 1.

    PWM_x HighFET_x LowFET_x
    ----------------------------------------------
    1 ON OFF
    0 OFF ON

    The output does not support 100% duty cycle because of the bootstrap architecture. Please note section 7.3.2.1 which describes the bootstrap capacitor recharge sequence.
  • Hi Rick,

    Thanks very much. I understand that. I will limit the duty cycle to allow for bootstrap recharge.

    regards,

    Basil