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DRV8702D-Q1: AVDD / DVDD Disabled and nSleep Pin Power Domain

stomp
Genius 4675 points
Part Number: DRV8702D-Q1

Hi,

I have a DRV8702D-Q1 on a board. I've configured it very closely to the DRV8702D-Q1EVM.

However on my hardware I have the nSleep Pin connected to DVDD, my assumption here was the voltage regulators would be powered, the nSleep pin pulled high and life would be happy.

In my situation I have no AVDD or DVDD voltages, I assume this is because the nSleep pin is low.  Referring to the DRV8702D-Q1.PDF, table 8.3.1.1 it seems that at any time nSleep is low, the regulators are disabled, however if I refer to 8.2 Functional block diagram, it suggests that the regulators are independent of the nSleep function as the control logic is powered from DVDD.

My question is what happens if I pull nSleep high from another voltage source (such as a IO pin on a MCU)?. Are there any dangers in risking powering the DRV8702D-Q1 via parasitic power through the nSleep pin?

Thanks

Stomp!.

  • 0
    TI__Prodigy 190 points

    Hi Stomp,

    The functional block diagram is a high level outline of the device and won't show all the internal connections, and you are correct, if the nSLEEP is low, DVDD will be turned off as well and the nSLEEP pin will need to be pulled up by another source. The nSLEEP pin is a control input that can be toggled by a controller (which is done in the EVM). Using an IO pin from a MCU is fine as long as the appropriate voltage level is used. Referring to table 7.5, the nSLEEP Input logic-low voltage is 0-0.8V and the Input logic-high voltage is typically 1.5-5.25V.

    Regards,
    Mostafa

  • 0 in reply to Mostafa Shubbar
    Genius 4675 points
    Hi,

    Thanks very much for the quick response.

    Maybe a dot point in the next datasheet revision would help others in understanding nSleep must be powered from a different voltage source, for me this was unclear and caused confusion.

    Thanks
    Stomp!.