DRV8323: Gate driver fault

Hi Adam,

thank you for the information.

I got feedback from my customer:

in our case it is not a matter of Tdrive. The FET is switched on proper.

But during operation the gate voltage drops, due to very high currents in the system, and causes a GDF error of the DRV.

We think the voltage level is still high enough for save operation of the FET.

Without knowing the exact voltage level, at which the DRV trips the GDF-error, it is difficult for us to decrease the gate voltage drop to a save level.

Regards,

Stani

Stani,

Thanks for the explanation. I'm not sure of which traces are shown above but I assume the red circle is showing the gate signal?

The thought here is that if they are really having a gate drive issue, the FET will probably be entering the resistive region and generating enough voltage to trip the VDS monitor as well. Are they using VDS monitoring?

Another thing to consider is that these faults are sticky and need to be manually cleared, is the customer clearing them and do they reoccur?

Regards,

-Adam

Hi Adam,

thank you for your reply. I will get back to my customer tomorrow to get more answers.

But in the main time, could you please provide me with the answer to the question asked in the first post: is there a certain threshold of Vgs at which the DRV recognises an GDF-errors? if yes what is that threshold?

thank you.

Regards,
Stani