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DRV8353R: Charge Pump Input Current VM

Dragos Moscalu
Prodigy 170 points
Part Number: DRV8353R
Other Parts Discussed in Thread: DRV8353

Hello TI team,

I need to clarify some technical topics, that will influence the decision of choosing DRV8353S or DRV8353RS variant of the chip. Mr. Klenk Benjamin recomended to ask directly the quiestion on this forum.

1)      Is the internal buck regulator completely separated internally, from the main circuit die ? (in two separated dies) I need this info for the DFMEA.

2)      VM supply current is stated into the datasheet for 48V (Table 7.5 Electrical Characteristics) and no PWM input. I will need this current for 17V, considering the CP different operating point. If possible, a graph of VM input current variation for the whole input voltage range, will be very useful (17V to 48V considering 25mA load on HS and 25mA on LS). Second case, 17V-48V but only 12mA HS-CP load and VGLS load.

3)     DVDD regulator can supply an external load of 10mA, and probably is the supply for the internal digital core of DRV835x-xx. Is this Idvdd already considered in VM total current specified for 48V (typ 8.5mA) ?

Thank You !

  • 0
    TI__Guru 65330 points
    Dragos,

    1. Yes they are seperate, only the GND is connected.

    2. Let me see if we have this.

    3. Yes.

    Regards,

    -Adam
  • 0 in reply to Adam Sidelsky
    Prodigy 170 points

    Hello Adam,

    Please send the information to Mr. Benjamin Klenk, I'm already in contact with him, or directly to my company email !

    Thanks,

    Dragos

  • 0 in reply to Dragos Moscalu
    TI__Guru 65330 points
    Dragos,

    Sorry for the delay. I have a question.

    Since you mention no PWM during this test, could you explain why 25mA load on VGLS (LS gate) and CP (HS gate) are needed? Since this is no PWM, the high load on the CP and VGLS doesn't make sense. The other question is that this is constant load while a normal operation average current will be much lower.

    Regards,

    -Adam
  • 0 in reply to Adam Sidelsky
    Prodigy 170 points

    Hi Adam,

    My concern is that the datasheet provides the VM supply current at 48V with no PWM. I'm intrested in the following cases:

    1) Current on VM line:

    a) for 17V - no PWM - current on VM will be the same as stated for 48V ?

    b) 17V - full PWM with FETs Qg=200nC, to fully charge the CP with 25mA on Vg_LS and 25mA on Vcp_HS. Ivm=2x25mA+Icp1(unknown)

    c) 17V - full PWM with FETs Qg=100nC, drivers loaded with ~12mA on Vg_LS and ~12mA on Vcp_HS. Ivm=2x25mA+Icp2(unknown)

    d) 9V - full PWM with FETs Qg=100nC, drivers loaded with ~12mA on Vg_LS and ~12mA on Vcp_HS. Ivm=2x25mA+Icp3(unknown)

    e) 48V - full PWM with FETs Qg=100nC, drivers loaded with ~12mA on Vg_LS and ~12mA on Vcp_HS. Ivm=2x25mA+Icp4(unknown)

    As you can see I can't estimate the CP behaviour (Icp) for different operation points, of input voltages, and 20KHz switching frequency.

    2) Are all grounds, GND, AGND & DGND separated in the chip, or they are internally connected together ? in DRV8353RS

    Thanks for your support !