DRV8889-Q1: Handling of control pins at SPI control

Tomoaki Yoshida91

Genius 5255 points

Part Number: DRV8889-Q1

Hi team,

We will evaluating DRB8889-Q1 by SPI communication.

Could you tell me how to handle control pins then?

Can DIR pin, STEP pin, DRVOFF pin and nSCS pin be connect directly to GND?

Because we don't need sleep mode, we will connect nSLEEP pin directoly to 5V or 3.3V.

Is this all right?

If you have any concerns, please let me know.

Best regards,

Tomoaki Yoshida

over 6 years ago

0 Wang5577 over 6 years ago

TI__Guru 56650 points

Yoshida-san:

Use datasheet (www.ti.com/.../drv8889-q1.pdf) as reference:
a. "The nSCS pin should be taken high for at least 500 ns between frames." So, nSCS cannot be tight to ground.
b. From Table 10. Functional Modes Summary, nSLEEP can be pulled high and DRVBOFF can be tight to ground.
c. Logic Level Pin Diagram shows the STEP pin and DIR pin internal pulldown resistor. They can be connected to GND directly.

0 Tomoaki Yoshida91 over 6 years ago in reply to Wang5577

Genius 5255 points

Hi Wang-san,

Thank you for your support.

I understand that nSLEEP can be connected to 3.3V or 5V power line directly without pull up resistor and DRVOFF can be connected to GND directrly without pull down resistor.

Is it correct?

Best regards,
Tomoaki Yoshida

0 Wang5577 over 6 years ago in reply to Tomoaki Yoshida91

TI__Guru 56650 points

Yoshida-san,

NSLEEP pin can be pulled up source or ground directly. But, 5.5V is the nSLEEP maximum absolute voltage rating. Please make sure any pin not over stress at any time.

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DRV8889-Q1: Handling of control pins at SPI control