DRV8350: First design and use DRV8350, Please help on reviewing and some questions.

Yue,

Schematic feedback:

1.  The VCP capacitor is incorrect, this cap must be connected from VCP to VDRAIN and it should have a 100V rating.
2.  Please also make the CPH/CPL capacitor 100V rated.
3.  Pin 18 is the MODE pin, the selection of this pin depends on the customer's need, will the customer be using 1X, 3X, or 6X PWM? Currently the 75l they have there is not valid for any mode.
4.  Pin 19 is the IDRIVE pin, based on the FET mentioned, they should use the lowest IDRIVE setting which means pulling IDRIVE pin to GND directly. They should include a 0 ohm resistor in case this needs to be changed later.
5. Pin 20 is the VDS pin, this must be decided by the customer. The RDSON of the FET is 12mOhms. Once the customer knows their expected current limit they can calculate the associated VDS limit and program the DRV so that the device will protect above this current limit.
   1. VDS limit = (FET CURRENT) x (RDSON)
6. The gate resistors and diode are not needed when using Smart Gate Drive and IDRIVE, I would remove these components.
7. Please make sure that the SLA/SLB/SLC pins are routed to the Low-Side FET Source directly and not the board GND plane. You can check the DRV8350 EVM for an example.

FET selection will control the selection of IDRIVE and customer must select appropriate VDS for their application. MODE is not dependent on FET selection.

IDRIVE for CSD19533: Pull IDRIVE to GND through 0 ohm. This FET has very small QGD so gate resistance may be needed if FET gate and source are ringing. 

The DRV8350 has VDS protection which will help cover OCP and short circuit protection. The device also has VGS protection to ensure that each FET is OFF or ON only when intended. For most customers this is enough coverage.

Regards,

-Adam