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DRV8889-Q1: Is it problem to input a high level signal to nSCS pin or DRVOFF pin in sleep mode?

Yoshiki Ochi
Genius 9455 points
Part Number: DRV8889-Q1

Hello supporting team,

This is Ochi. Could you tell me a problem to input high level signal to nSCS pin or DRVOFF pin in sleep mode?

From Table10, DVDD regulator and logic are disabled in sleep mode. I wonder if DRV8889-Q1 is broken up by high level signal in sleep mode.

In the case DRV8889-Q1 is not broken, does DRV8889-Q1 make no response then?

Best regards,

Ochi

  • 0
    TI__Guru 56650 points

    Ochi-san,

    In sleep mode, there is no problem to have a logic high voltage on nSCS pin or DRVOFF pin.

    If that logic high voltage is under the nSCS pin or DRVOFF pin maximum voltage rating, DRV8889-Q1 should be OK. But, the IC won't do any function in sleep mode.