Hi team.
I use DRV8320S to do ESD testing.
The Fault states showed VGS_LC.
What kind of obstacle is VGS_LC?
Sincerely.
Kengo.
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Kengo,
Per the datasheet:
This means that the Low-Side FET for the C phase was not able to turn on before the TDRIVE time expired. The DRV or the FET may be damaged.
This fault can also mean that the low-side FET is turning on when it should be off or turning off while it should be on.
Is this your own board or an EVM?
Regards,
-Adam
Adam.
Thank you for your quick response.
We evaluate with our application.
I understand this fault states.
Could you tell me about bellow my questions?
1. When VGS_LC alert , is nFault output?
2. If nFault is not output at VGS_LC alert, does not DRV & FET stop?
And one more question.
GDF can be disabled, when does it use?
Sincerely.
Kengo.
Kengo,
Please check this table in the datasheet:
The VGS fault is listed above as GDF, as you can see, if DIS_GDF is 0, then the nFAULT pin will report.
Some customers choose to disable GDF when they are using some strange dead time or independently controlling the HS and LS FET.
There is no normal reason to disable GDF because without it there can be shoot-through.
Regards,
-Adam