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DRV8811: Oscillation on Decay input Pin

Part Number: DRV8811

Hello, as visible in the scope shot above- my team is having an issue with a 1V p2p, 75Khz oscillation on the input Vref pin.

We installed the 0.1uF as directed in the datasheet

The voltage is coming from an AD5308. 

When we removed the 0.1uF cap, the signal is stable on the pin, but this goes against the datasheet recommendation.

Any ideas?

Thanks,

Mike

  • Hi Michael,

    Can you confirm the scope captures signal names are correct. In the title and scope capture, the signal oscillating is DECAY but in the question the signal oscillating is VREF. Which one is oscillating?

    Assuming this is the DECAY input, is the DECAY signal crossing the AOUT1  or running parallel to AOUT1 for some distance? There could be coupling there from AOUT1 to DECAY. If this is the case, you could try separating the two traces as an experiment.

     

  • Hi Rick,

    Thanks for the response.

    Yes the two names are correct.  The DECAY signal is the main one with an issue, I misspoke above saying VREF.

    The signal will look like this whether the motor is moving or static, so I'm not entirely sure if this is due to coupling.

    The chip is on a PCBA, so it will be tough to separate the traces.

    Any idea where this pure 75khz ring might be coming from? We are stepping the motors much slower (2000sps).

    When I remove the 0.1uF cap on DECAY this is what the signals look like:

    Thanks,

    Mike

     

  • Hi Mike,

    Thanks for the confirmation.

    When the DRV8811 is enabled, the outputs are switching. This could lead to coupling on the DECAY pin if the layout is not ideal. It is still confusing where the 78kHz comes from.

    The AD5308 states:

    The output amplifier is capable of driving a load of 2 kΩ to GND or VDD, in parallel with 500 pF to GND or VDD. The source and sink capabilities of the output amplifier can be seen in the plot in Figure 14.

    Is it possible the capacitor is overloading the AD5308 and causing this?

    Can you cut the trace between the AD5308 plus capacitor and DECAY pin, and measure the voltage? You will need to supply the desired voltage on the DECAY pin for proper current regulation.

  • Rick

    I have been working on this problem with Mike.  It appears the AD5308 output amp has stability problems driving a 0.1uF load.  This is 200x more than 500pF.   Assuming ADI is specifying the AD5308 max C load is 500pF.   None-the-less, we are wondering why TI is specifying a 0.1uF cap on the DECAY pin.

    We have seen some oscillation on the DRV8811 VREF pin as well.  This net is not loaded with an external capacitor.  Can TI advise on what is the input capacitance on the VREF pin for the DRV8811?  We'd like to understand how the DRV8811 is loading the AD5308 DAC.  If would be a big help to know the input impedances of the DRV8811 inputs for both VREF and DECAY pins.

    Dave

  • Hi Rick,

    You found the root cause, the DAC had too much capacitance, changing it to 1000pF completely removed the oscillation.

    I'd just like to confirm there should be no operational issues with the DRV8811 if the Decay pin only has a 500pF cap instead of the 0.1uF suggested in the datasheet.

    Thanks,

    Mike

  • Hi Mike,

    Glad to hear we were able to debug it.

    Lowering the capacitor should not be a problem. The goal is to minimize the ripple on the DECAY pin so it can provide a reference voltage as shown in Figure 8 of the datasheet.

    Any ripple could change the decay mode depending on how close the DECAY pin is set to 0.6xVcc or 0.21xVcc. Also there could be some variation of the fast decay percentage. Assuming Vcc=3.3V, it appears you are using mixed decay, and the variation in fast decay percentage based on the ripple with no capacitor of ~200mV is about 11% (22% at 1.18V to 33% at 910mV). 

    If 500pF has lower ripple, the variation of fast decay percentage should be tighter.

  • Hi Dave,

    Sorry, I missed this entry.

    Both the VREF and DECAY pin are high impedance signals. VREF is the reference voltage for the DAC and modified by the indexer (Table 2 of the datasheet).

    DECAY sets the decay mode.

    Both could be susceptible to noise, but DECAY can be more susceptible because it is next to AOUT1.

    If noise is observed on either, adding a capacitor can help.

  • Rick

    So, you do not expect the input C load on the VREF pin to be > 500pF?   I ask this because Mike was showing me oscillation on the VREF net the other day.

    Dave W

  • Hi Dave,

    I don't think the VREF input pin capacitance will be >500pF. I expect it to be <20pF. 

  • Rick,

    Hmm.. again I walked into the lab earlier this week and Mike showed me VREF was oscillating.  Oscillation was not on the X axis in this post but another axis which is the same design.  We all understand why DECAY can oscillate.  And I had seen the oscillation vanish when I remove the 0.1uF cap maybe a week or so ago.  But if  the input load on DRV8811 pin VREF is indeed  < 20pf - we do not have an explanation for why it oscillates as well. 

    We have a DAC driving both (VREF/DECAY) analog inputs to the DRV8811 - both have shown oscillation. One input is terminated with a cap of 0.1uF the other input is not terminated.    

    Dave

  • Hi Dave,

    Can you provide a snippet of the schematic and layout from the DAC to the VREF pin for the VREF?

    Are there any high current signals passing near the VREF trace?

    What is the p2p oscillation and frequency?

  • Rick

    What I remember is the VREF oscillation was very similar to the DECAY oscillation - when viewed on the scope.  About 1V pk-pk and in the ~ 75kHz range.

    I do not control these items you requested.  But I will request them tomorrow (9/20).  It may take some days to review the layout. 

    Thank you for the help. 

    Dave 

  • Hi Dave,

    We will await the layout.

    If you have a zoomed in version of the second scope capture also, please provide it also. Noise on VREF is not an issue as long as VREF is relatively stable when the current is at the point to be regulated.

  • Rick

    Mike was planning on taking a more detailed look at VREF soon

    Dave

  • Vref looks stable, relative to Decay.

    - Mike

  • Mike,

    Sorry; I thought the DECAY pin question was resolved. Can you confirm that there is no longer an on DECAY after the capacitor was reduced.

    Is the VREF ripple acceptable?

    For VREF, please consider adding the footprint for a capacitor if you plan to modify the PCB and have space. This would allow you to reduce ripple if you find a problem at a later date. 

  • Hi Rick,

    You're correct it is solved.

    Thank you for the suggestion regarding adding a footprint for a cap and not stuffing it until needed

    Mike