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DRV8873-Q1: Disable Pin Control Needed for OLP

Part Number: DRV8873-Q1

Hello Team,

I understand FET needs to be HiZ when we run the Open Load Detection in Passive Mode (OLP), so D/S describes that "Set the pin DISABLE high".

If we do the setting like below, All FETs are HiZ without "Set the pin DISABLE high". Even in this case, must we set the pin DISABLE high? (I want to reduce the control line from the MCU)

1. Select PWM Mode, and EN/IN1 = 0, PH/IN2 = 0. 

2. Select the independent mode, and EN/IN1 =0, PH/IN2 = 0, and OUT1_DIS =1, OUT2_DIS =1.

Thanks for your support.

Regards,

Hirata