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DRV8812: nFAULT Low time & nRESET connected

Part Number: DRV8812

HI, staff

To realize self-recovery of DRV8812, we plan to connect the nFAULT terminal and the nRESET terminal to enable RESET at the nFALUT terminal.
Also, connect a circuit that also has the time constant of Capacta and Register to the outside of the nRESET terminal. (Time constant: 3ms)

In order to achieve self-recovery, we request the following questions.

Q1.If OCP is enabled, how long is nFAULT LOW?
   (What are the conditions for returning the nFAULT pin from Low to High?)

Q2.Are the constants of C and R R=39KΩ and C=0.1uF to make the time constant 3ms?

Q3.When connecting nFAULT pin and nRESET pin and connecting C and R external elements, is it OK to delete the 10kΩ resistor in Figure 7 of the data sheet?
   (Pull up nFAULT pin with 39kΩ.)

best regards
cafain

  • Cafain,

    1. If OCP is triggered, it will keep low until either nRESET pin is applied, or VM is removed and re-applied.

    2. RC time constant is equal to R value x C value = 39 kohm x 0.1uF = 3.9ms

    3. I would also like to put a series resistor (100ohm or few hundreds ohm) between nFault and nRESET to control the retry timing. If there is no series resistor, nRESET capacitor will discharge to nFault pin. That may give an inrush current to nFault pin.

  • HI, Wang5577

    Thanks for the prompt response.
    Let me ask you a little more.

    Q4. Does nFAULT also stay low while OCP stays low?

    Q5. Is it OK to input a signal with a long rise time (for example, 10 ms) to the nRESET pin?
      (If the nRESET pin is at CMOS level, it is not possible to input a signal with a long rising edge.)

    Q6. It can be understood that the device overheating can be considered by shortening the OCP repetition time.
    How should the value of the series resistor between nFAULT and nRESET be determined?

    I am worried that the 3.9ms time constant can protect the heater.
    Can you introduce a recommended circuit that enables self-recovery that enables nRESET with the nFAULT signal?

    best regards
    cafain

  • cafain,

    Q4: Yes. If OCP is triggered, it will keep low until either nRESET pin is applied, or VM is removed and re-applied.

    Q5: Yes. It should be OK to input a long rising signal on the nRESET pin.

    Q6: The OCP rest time = nRESET falling time (at nFault low) + nRESET rising time (when nFault is pulled high)

    If we assume the resistor value between nRESET and nFault is much smaller than nFault 39kohm pull-up resistor; nRESET pin capacitor is 0.1uF. nRESET minimum logic high voltage is 2V. The OCP rest time is about 3.9ms (nFault and nRESET pin voltage is pulled up from 0v to 2v).

  • Hello Li san

    I understood how to use it.

    Thank you very much.

    cafain