Hi Team,
The datasheet tells that "When in cycle-by-cycle (CBC) mode a new rising edge on the PWM inputs will clear an existing overcurrent fault" and '"Normal operation continues automatically (gate driver operation and the nFAULT pin is released) after the tRETRY time elapses. The FAULT, VDS_OCP, and MOSFET OCP bits stay latched until the tRETRY period expires".
I want to confirm: when OCP occures, will the rising edge on the PWM inputs clear the fault after tRETRY time elapses? Or will the rising edge on the PWM inputs be able to clear the fault before the tRETRY time elapses?
Thanks and Best Regards!
Hao
