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DRV8323: Disconnect VM while VDRAIN is still connected to power

Emil Popov
Prodigy 110 points
Part Number: DRV8323

Hi,

I'm revising a PMSM driver design, to use DRV8323S and I'd like to be able to drop power to the VM pin in order to prevent the DRV8323 from commutating the bridge. The reason for this is that I want to have a safety circuit that prevents all commutation, but I don't want to interrupt the high-current path going to the bridge.

What I cannot figure out from the datasheet is if it's allowed to have VDRAIN connected to motor voltage, VREF and SDO pulled up to 3.3 while there is no motor voltage coming into the VM pin.

Would the chip get back-fed through VDRAIN?

Would the 3.3V fed into VREF damage anything because there is no voltage on VM?

p.s. I know that I can simply pull the enable pin what I want to inhibit commutation, but In my mind, disconnecting VM is intrinsically safer if you consider possible failures of the DRV8323 itself

p.p.s. I do understand that after re-applying voltage to VM, the chip would have to be re-initialized, and that's OK.

Thanks in advance

  • 0
    TI__Guru 65460 points

    Ermil,

    Thanks for posting on the MD forum!

    Many of the internal device functions such as the charge pump, VGLS regulator, and DVDD regulator are supplied from VM whereas VDRAIN is mostly a monitor input. Once VM goes below the UVLO threshold the device will safely shut down.

    I don't expect VDRAIN to back feed into the device. The 3.3V should not bother the VREF pin or the SDO pin.

    Will the VM pin be disconnected with a FET or similar? Or simply the supply turned off?

    Regards,

    -Adam

  • 0 in reply to Adam Sidelsky
    Prodigy 110 points

    Hi Adam,

    Thanks for the response.

    Yes, I plan on cutting VM through a MOSFET, so there might be a little bit of leakage current if this is what you are concerned about.

    I can probably take care of if with a pull-down resistor, but I don't mind the chip doing into sleep mode and I'm pretty sure I can pull Vm below the UVLO threshold.

    Is that what you were asking about?

  • 0 in reply to Emil Popov
    TI__Guru 65460 points

    Ermil,

    This sounds good to me. In some of our devices there can be leakage out of the VM pin when VDRAIN is left powered and VM is shut down. Disconnecting VM via a FET should work well though since this would limit any potential leakage.

    Regards,

    -Adam

  • 0 in reply to Adam Sidelsky
    Prodigy 110 points

    Thank you.

    I'll mark this as resolved.