Other Parts Discussed in Thread: DRV8305,
A bit of background: I have a design that uses DRV8305 and in it, I keep the EN signal low while ( during power-up ) I configure the IDRIVE, TDRIVE, Vds protection, ShuntAmp callibration, etc.
When the DRV8305 is configured, my MCU outputs 6 pwm signals at 50% while the EN signal is still kept low. When my drive gets enabled, I simply raise the DRV8305's EN pin and begin creating the motor wave-forms that are centered around 50%. This all works well and is quite clean as a concept because I don't have to mess with the MCU's PWM module even when I drop the EN signal to disable the bridge.
I am now migrating the design to DRV8323 in order to support 48V operation. I will be using the S variant and will be configuring everything through SPI. The DRV8323 datasheet specifically states that when the ENABLE pin is low, the SPI is inactive, so I have to revise the above algorithm because I don't want to commutate the output stage before the initial configuration and I need to have a way of disabling the bridge when my drive's enable bit gets cleared.
My question is, what is the proper start-up procedure that was envisioned for the DRV8323?
Again, the goal is to keep the bridge from switching while I perform SPI transfers for configuration and calibration and It seems I'm required to have the ENABLE pin high for this step.
The only solution I see is to set the 6 PWM signals from the MCU to an invalid state ( All high or all low) in order to force the DRV8323 to put the bridge in high-impedance while the ENABLE pin is high, but this doesn't sound like a clean solution and I feel like I'm missing something..... or maybe I just got spoiled by the way that the DRV8305 does things.
Any thoughts or recommendations?
Thanks
