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DRV8711: Could you give me your reply about timing parameter, tD(SDATO)?

Part Number: DRV8711

 Hello guys,

 One of my customers is considering using DRV8711 for their new products.

 They have a few questions as the following. Could you please give me your reply?

 Q1. DRV8711 datasheet, 6.6 SPI Timing requirements on page 7 says that the maximum value of the timing parameter, tD(SDATO) is 10ns.

       I think this is very faster than I expected because SDATO is open drain output and SDATO rising time is depend on pull-up resistance and load capacitance.

       Could you please tell me what pull-up resistance and load capacitance are used for the tD(SDATO) measurement?

 Q2. What is the high level judge voltage of SDATO for the tD(SDATO) measurement?

        According to Figure 1 in the device datasheet , it seems that the voltage is about 90% of pull-up voltage. Is this correct?

 Your reply would be much appreciated.

 Best regards,

 Kazuya.   

  • Nakai,

    Q1: 10ns tD(SDATO) talks about the DRV8711 internal logic circuit capability. SDATO can start to response within 10ns.

    Yes. The SDATO pin voltage rising edge timing is depended on how much capacitance you put on SDATO pin. But, that rising edge time constant is related external pull-up resistance and external SDATO capacitor's capacitance. This time constant is much longer than 10ns. So, we can ignore the DRV8711 internal delay from SCLK to SDATO during read.

    Q2: SDATO is connected to the host controller. The logic high voltage is decided by the host controller. Figure 1 shows 90%, but, different host controller may have different logic high voltage tolerance. The SDATO rising edge time constant is related to the pull-up resistor and SDATO capacitor (if customers put a capacitor on SDATO pin).

  •  Hello Wang,

     Thank you very much for your reply.

     I could understand well.

     Thank you again and best regards,

     Kazuya.