Hello,
I would need an output delay time of DRV8889-Q1 after these actions are taken. Could you share with me the numbers?
- Max delay time until the outputs get disabled after DRVOFF pin is pulled High
- Max delay time until the outputs get enabled after DRVOFF pin is pulled Low
- Max delay time until the outputs get disabled after 1b is written in DIS_OUT bit of CTRL2 control register
- Max delay time until the outputs get enabled after 0b is written in DIS_OUT bit of CTRL2 control register
- Delay time until the outputs change after a rising edge at STEP pin
Best regards,
Shinichi Yokota