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DRV8873S-Q1EVM: DRV8873S-Q1

Part Number: DRV8873S-Q1EVM

Dear all, 

here is the problem description for the Valve driver (DRV8873S-Q1) from TI:

 We need to configure the valve driver to independent half bridge mode:

(IC1 Control Register 0x52).

However, the behaviour of the driver blocks always appears as if the "Default Mode" (PWM) is still active. We already read-out the control register and the right value for independent mode is written on the register but it still works as PWM mode. 

  • Hi Saman, 

    For the S variant EVM, it is correct to set IC1 Control register to 0x52 for Independent Half Bridge mode.

    We have additional follow up questions: 

    1. Are other SPI writes working? 
    2. Are reads of the registers working?
    3. Has the EVM been modified? 
    4. Could you provide a scope capture of the writes and reads? 

    Thanks, 

    Madison Eaker 

    Motor Drivers

  • Hi Madison,

    Thanks a lot for the Feedback. 

    1. Other SPIs are not writing in the same time.
    2. Yes reading is working and the 0x02 (independent half bridge mode) is correctly in the register written.
    3.  actually the version EVM is not known for us. I chose this because it was the only possibility which was automatically suggested by Forum
    4. I will upload this as soon as I have it from my experts.

    regards,

    Saman

  • Hi Saman, 

    We will check back once you provide the scope image of the reads and writes.

    Thanks, 

    Madison Eaker

  • Hi Madison,

    attached, please find the snapshot from signals.

    Thanks for the support.

    regards,

    Saman

  • Hi Saman, 

    From the scope capture, there is a write of register 0x02 with the value 0x52, but there is not a read. Could you please provide a scope capture of the read? The data in register 0x02 was 0x51 prior to the write. 

    Another item to try is to disconnect the load and measure each output separately. This is the easiest way to determine if the mode changed from the inputs. Make sure the nSLEEP pin is not set low after the write of 0x52. If nSLEEP is cycled, the register are set back to default. 

    Thanks, 

    Madison Eaker

    Motor Drivers