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DRV8702-Q1: nSLEEP behavior

Part Number: DRV8702-Q1


Once in SLEEP state the data sheet says that the FETs are held off by weak pull downs (150K nominal according to the data sheet).

The data sheet also says that it takes up to 100us from nSLEEP going low until the chip is actually in SLEEP mode.

What happens if nSLEEP is asserted low while FETs are turned on?

It would be logical that nSLEEP be gated with the IN1 and IN2 signals such that at the beginning of the 100uS period the FETs are turned of normally (using IDRIVE level gate current), and then the chip switches to the 150K pull downs.

But that isn't documented anywhere.

If the chip simply applies the 150K pull-downs while the FETs are on, they will turn off very slowly. For example, if Vth is 3V, the pull-down will sink only 20uA, and a FET with a gate-drain charge of 5nC will take 250uS to turn off. If there is any significant load current flowing the FETs will experience very high stress during that time.
My question: is it safe to assert nSLEEP while the FETs are on and carrying load current?

  • John,

    if nSLEEP is asserted low while FETs are turned on,  it takes up to 100us from nSLEEP going low until the chip is actually in SLEEP mode.(150K ohm pulldown resistor).

    It is safe to assert nSLEEP while the FETs are on and carrying load current:

    1. DRV8702 has enough dead time to avoid high side FET, low side FET shoot through.

    2.before chip is actually in sleep mode, the input signal should not keep driving the winding current up. .

    .

  • Wang5577 said:
    2.before chip is actually in sleep mode, the input signal should not keep driving the winding current up. .

    If MODE = 0, there is no combination of input signals that turns all four FETs off.  Applying IN1 = x, IN2 = 1 will apply positive or negative voltage to the motor (depending in IN1).  Applying IN1 = x, IN2 = 0 will short the motor winding.  If the motor is spinning, shorting it will cause armature current to increase.

    The reason for my question is that I am considering using the SLEEP input as a hardware shutdown that does not require software intervention.  As such, I have no control over the timing of SLEEP.  So I need to be sure it is safe to enter SLEEP at any time regardless of armature current or motor speed.

    I am currently planning to use the DRV8702 in MODE=0.  If I apply PWM to IN1, I get locked anti-phase. If I apply DIR to IN1 and PWM to IN2, I get sign+magnitude.  In both cases, it is impossible to turn all four FETs off using the INx terminals.

    If I switch to MODE = hi-z, it becomes possible to have "all FETs off", however, external logic is needed for both locked anti-phase and sign+magnitude.  So I would prefer to use MODE=-0 and use SLEEP for "all FETs off" input.

  • John,

    Yes. In MODE=0, only sleep mode put all FETs off. In mode=HiZ, it becomes possible to have "all FETs off".

    The motor speed should be reduced when the motor winding is shorted (IN1=x, IN2=0) if only DRV8702-Q1 drivers the motor. I would put in this mode first. And then, set nSLEEP pin low.

  • The "answer" simply tells me what I already know (and spelled out in my question).  The questions is "does the DRV8702 _actively drive_ all four FETs on upon entry to sleep mode, or does it simply apply the 150K pull-downs?"

    I have been able to find nothing in the datasheet that describes the actual behavior of the chip.  And none of the previous answers have done that either.

  • In sleep mode, the DRV8702 doesn't actively drive all four FETs. But, it should keep all four FETs off.

    The sleep mode tries to shut down all internal circuits if possible to save the input quiescent current.