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DRV8860: Reading Fault Register in Daisy Chain Mode

DO-Pro
Intellectual 610 points
Part Number: DRV8860

Hi,

I have some questions about reading a Fault register in daisy chain configuration. Based on the Figure 15, Reading Fault Register - Daisy Chain (data sheet, p.17), the clock pulses should continue until Fault data from all daisy-chained drivers is fully read out. However, it's not clear, what data, if any, will be clocked out of the first driver in the chain, once the clock train begins to affect the next driver downstream. Below I've included Figure 15 of the data sheet to illustrate my question.

So my questions are below as follows.

Q1: What data, if any, comes out of DOUT 1 pin starting with the falling edge of the CLK 17 signal and beyond? Will first driver in the chain simply roll over and start sending out its respective Fault data again or will it send out data previously clocked into its shift register via DIN 1 pin or will that be arbitrary undetermined data or something else?

Q2: Since reading Fault register occurs with Latch signal being HIGH, what's a correct way to exit Reading Fault register mode? Figure 14 of the datasheet recommends toggling Latch line to LOW but wouldn't that constitute the beginning of any other command as they all start with Latch signal going HIGH-to-LOW? My goal is to put the driver in some sort of neutral idle mode so that I can safely use SPI bus to talk to some other device accompanied by different CS signal. In other words, how to make sure that unwanted extraneous data isn't clocked into DRV8860 in this case?

Thank you for your support.

Regards, Michael

  • 0
    TI__Mastermind 37683 points

    Hi Michael,

    Thank you for posting to the Forum.

    Let me research this and I will get back to you with a reply by 8/18 US time.

  • 0 in reply to Pablo Armet
    TI__Mastermind 37683 points

    Hi Michael,

    Your questions require more research than I had anticipated. I will provide answers to your questions by 8/20. Thank you for your patience in advance.

  • 0 in reply to Pablo Armet
    Intellectual 610 points

    Hi Pablo,

    Have you had any chance to get more information regarding my questions?

    Thank you,
    Michael

  • 0 in reply to DO-Pro
    TI__Mastermind 37683 points

    Hi Michael,

    Unfortunately, I am still researching your question. I had to contact the design team for this device in order to provide you with a more accurate answer to your questions. I will reply back as soon we find the answers.

    I apologize for the delays and appreciate your patience.

  • 0 in reply to Pablo Armet
    Intellectual 610 points

    Hi Pablo,

    Do you have any luck to get my questions answered?
    Any idea about some possible target date?

    Regards,
    Michael

  • 0 in reply to DO-Pro
    TI__Mastermind 37683 points

    Hi Michael,

    I am still looking researching your questions. You should expect an answer by end of day tomorrow.

    I apologize for the delay and appreciate your patience.

  • 0 in reply to Pablo Armet
    TI__Mastermind 37683 points

    Hi Michael,

    Below are the answer to your questions:

    Q1: What data, if any, comes out of DOUT 1 pin starting with the falling edge of the CLK 17 signal and beyond? Will first driver in the chain simply roll over and start sending out its respective Fault data again or will it send out data previously clocked into its shift register via DIN 1 pin or will that be arbitrary undetermined data or something else?

    A1: Data coming out of DOUT1 pin after CLK17 corresponds to the data coming in.

    Q2: Since reading Fault register occurs with Latch signal being HIGH, what's a correct way to exit Reading Fault register mode? Figure 14 of the datasheet recommends toggling Latch line to LOW but wouldn't that constitute the beginning of any other command as they all start with Latch signal going HIGH-to-LOW? My goal is to put the driver in some sort of neutral idle mode so that I can safely use SPI bus to talk to some other device accompanied by different CS signal. In other words, how to make sure that unwanted extraneous data isn't clocked into DRV8860 in this case?


    A2:     The best way to exit Reading Fault is holding the CLK low. Latch signal can be brought low which wouldn't do anything as long as CLK remains low.

  • 0 in reply to Pablo Armet
    Intellectual 610 points

    Hi Pablo,

    Thank you for providing these answers. I think I'm fine with A1 answer. Regarding the A2,further question is below.

    Q3: So if I have to bring LATCH low to exit Read FAULT Register mode, does it mean that the only way to continue using SPI lines to communicate with other devices is to gate CLK signal to the DRV8860 so that no CLK pulses appear at its input while LATCH is held LOW? My take is that it's the case but I'd like to double check.

    Thank you,
    Michael

  • 0 in reply to DO-Pro
    TI__Mastermind 37683 points

    Hi Michael,

    Q3: So if I have to bring LATCH low to exit Read FAULT Register mode, does it mean that the only way to continue using SPI lines to communicate with other devices is to gate CLK signal to the DRV8860 so that no CLK pulses appear at its input while LATCH is held LOW? My take is that it's the case but I'd like to double check.


    A3: Yes. That should be one way of continuing SPI communication between the other devices.

  • 0 in reply to Pablo Armet
    Intellectual 610 points

    Thank you, Pablo.
    This resolves my issue for now.

    Regards, Michael