This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8306: Motor drivers forum

Part Number: DRV8306
Other Parts Discussed in Thread: CSD18514Q5A

We prototyped a BLDC motor control board.

The following points seem to work fine.

・Speed control by changing PWM pin.

・Forward/reverse rotation control at DIR pin.

・Brake control at BRAKE pin.

However, the current and heat generated a lot, so when I examined the waveform, it looked like the attached image.

The left side of the PWM waveform of the FET output in each phase is the GND level.

When the rotation is reversed, the right side of PWM becomes GND level.

I adjusted the IDRIVE terminal, but it did not change.

The FET used ONSemiconductor's NVTFS015N04C.

https://www.onsemi.jp/PowerSolutions/document/NVTFS015N04C-D.PDF

I doubt the compatibility with FET, so I tried another FET SiRA18BDP, but it didn't change.

https://www.vishay.com/docs/77143/sira18bdp.pdf

When GLA, GLB, and GLC change from H to L, it seems that the FET is malfunctioning and turned on despite the GATE being L.

When GLA, GLB, and GLC change from PWM to L, it seems to be operating normally.

I would like to know if there are any points for selecting check points or FETs.

Thanking you in advance.

  • Hello,

    Thank you for posting to the MD forum!

    Could you resend your screenshots? They didn't go through in the original post. Please use "Insert File" to attach screenshots to the post.

    What IDRIVE settings are you using? The MOSFETs you are using have a very small Qgd value and using higher IDRIVE settings to drive small Qgd FETs can cause ringing or coupling that might result in cross-conduction across the half bridge. 

  • Thank you for your reply.

    I'm sorry that I failed to attach the image.

  • Sorry for the post being divided.

    For IDRIVE settings, I first tried AGND connection, no connection, and DVDD connection.

    I found that the Qgd value of NVTFS015N04C was small, but there was no change even with the lowest setting, AGND connection.

    Try a FET with a large Qgd value.

    Yesterday I experimented with FET replacement on the high side.

    I think this was meaningless, so I will replace the low-side FET.

    I will post again.

  • Post the results of the experiment.

    Changed the low side FET to SiRA18BDP.

    Qgd is a little big.

    This is the waveform when rotating at a slower speed.

    The operation does not change in particular.

    The current has also not particularly decreased.

    There is a slight difference in the left part of the PWM. A little PWM waveform appears.

    Does that mean you need to use a FET with a large Qgd?

    Or can it be solved by devising a circuit?

  • Hello,

    Sorry for the late reply, the "Resolved" status of the thread threw me off.

    There seems to be coupling into the GHx signals from your GHx waveforms. Could you send a scope capture of the high-side MOSFET (GHx-SHx), low-side MOSFET (GLx-GND), and the motor phase (SHx-GND) for one phase at the switching event? Your GHx captures seem to be with respect to GND, typically GHx is measured differential to SHx to capture VGS voltage. Having all of these together in one plot will show whether coupling is occurring on the high side/low side gate drive signals. 

    The min IDRIVE settings for this device is 15mA source / 30mA sink. Those settings will still cause rapid slew rates on the gate signals if you use a minimal Qgd FET. The best way to lessen the rise time would be to add gate resistors (10-50 ohms) on the gate paths or use a FET with a higher Qgd, typically 10-20 nC. 

    Can you share your schematic and/or layout? 

  • thank you for the advice.
    I also want to try a FET with a large Qgd, but first I will test the gate resistance. I will report the test results.

    Attach the circuit diagram and board image.

    I would be pleased if you could give me additional comments.

  • Hello!

    I did a test.

    [1]

    I inserted a gate resistance of 47Ω into the low side FET.

    There was no change in the waveform. FET is SiRA18BDP.

    [2]

    I exchanged it for a FET CSD18514Q5A with a large Qgd.

    However, there was no change in the waveform.

    I tested a simple consideration item that advised me, but there was no change in the waveform.

    There may be a fundamental design mistake. If you have any points to check, please give us your advice.
    Also, if you have any concerns about the circuit diagram or pattern diagram, please point out.

    Thank you for your consideration.

  • Hello again,

    Thank you for sharing your results. Before getting back to them, let me comment on your layout. (schematic looks fine)

    Layout

    Your gate drive (GHx, GLx) and motor phase signals (SHx) are very thin, some have sharp corner turns (GHC, GLC, and SHC), and some even go through vias (GHB, GHA, GLA, SHA). All of these issues will add inductance to the closed current loop when sinking and sourcing IDRIVE current to and from the MOSFET gates. As a result, this can cause ringing, coupling, or unintended MOSFET behavior. Ideally, we recommend all gate drive signals, the motor phase output (SHx), and SPx to be as wide and as short in length as possible to minimize inductance. These traces should be on the same side of the board if possible. 

    VDRAIN should also connect to VM at the high side MOSFET, not at the gate driver. Capacitor placement near the gate driver looks good. If possible, try adding "teardrops" to make the connections between pads and traces more smooth to reduce current reflections (this will also lessen inductance). 

    Please visit "Best Practices for Board Layout of Motor Drivers" if you need more tips on improved layout. https://www.ti.com/lit/an/slva959a/slva959a.pdf?ts=1598967651995&ref_url=https%253A%252F%252Fwww.google.com%252F

    Test Results

    Ideally I would've liked to see the 47-ohm resistance on both GHx and GLx, but because of layout comments above, I am leaning that this is more of a board inductance issue than gate drive current or MOSFET turn-on issue due to low Qgd. 

  • Hello!

    Thank you for your professional opinion. I understood the problem.

    Experiments to solve problems are difficult, so make a new board.

    I will reflect the points you proposed.

    It will take some time before the next report.

  • No problem. I will close this thread.

    Please post a new thread if you see any performance issues once you make a new board.