DRV8842: Typical Pulse Width

Hi Mark,

The DRV8842 datasheet specifies the maximum recommended PWM frequency of 100kHz (or 100ns). Furthermore, the duty cycle should be such that TON (time when signal is HIGH) is greater than the sum of the Trise and Tfall which is ~60ns.

I am a bit confused with the statements: "when motor driver (MD) provides pulses to motor every period, is 800ns" and "when MD provides pulse to motor but not for every period is 490ns". Can you clarify what you mean by those statements. 

Hello Pablo,

please find the figures below. Both present the same PWM condition, but different zoom. You can see that the input pulse is 500ns long but on output to motor there are pulses sporadically only. 

Under 500ns there are no output pulses at all.

Regards,

Jaroslav

Hi Jaroslav,

Thank you for providing the information.

I have further questions:

• are you PWMing IN2 as well or is IN2 set to HIGH or LOW?
• Is OUT2 PWMing?
• Can you provide a scope shot showing IN1, IN2, OUT1, and OUT2?

Hello Pablo,

I'm PWMing only  IN1, IN2 is LOW, see scope_30 and scope_31 for detail.

I also tried this test on DRV8842EVM with similar results - scope_32 and 33.

Regards,

Jaroslav

Scope_30:

Scope_31:

Scope_32:

Scope_33:

Hi Jaroslav,

What I think is happening here is that the TON time (500ns) is too short and does not allow for the output to turn ON all the time. Can you try increasing the ON time to lets say 1000ns while keeping the same PWM frequency. If the sporadic pulses on OUT1 are still present with the higher ON time, then we'll have to take a closer look at either your set-up or the driver to understand the root cause.

Yes, that's what I'm thinking too. If input pulse width is 800ns the output pulse is generated after every input pulse - see start of this topic.

The question is if this is per your specs (probably is as I measured similar results on eval board now) - I didn't see this information in datasheet.

I wanted to be sure that we didn't miss something in MD circuit design that may cause this issue.

So the only possibility how to generate smaller output voltage may be 1) lower PWM frequency or 2) lower input voltage

Regards,

Jaroslav

Hi Jaroslav,

Like I mentioned in one of my earlier replies, It is recommended that the minimum TON or TOFF width is greater than T_rise + T_fall. In the datasheet, the maximum rise time and fall time are 200ns respectively. Meaning to ensure there is enough time to properly switch the output state, you'll want a minimum of 400ns TON time. However, there might be cases where loading conditions can cause the rise time to be  higher than specified. In your case you have a 500ns width pulse and might be experience a corner case where the TON time is enough to switch the output but only in some instances.

What type of load are you driving? If it is a motor, do you know the resistance, inductance, and capacitance of the motor?

 [Q] - So the only possibility how to generate smaller output voltage may be 1) lower PWM frequency or 2) lower input voltage

lowering the PWM frequency will not lower the output voltage. The only way to lower the output voltage is to reduce the input voltage.

Yes, the load is DC motor: 3.6 Ohm, 231uH, capacitance is not defined.

Well, if the PWM frequency is lower, the period is higher, so with the 800ns pulses there is lower duty and average voltage. 

I calculated that 5 * mechanical motor constant is cca 12kHz. If we use 15kHz the motor spinning should be still good enough.

Regards,

Jaroslav

We need to test it, but it may be the way.

Thank you Pablo for discussion.

Jaroslav

Juroslav,

I will close this thread for now. If you ever need more help, you can always reply to this thread. If the thread is locked, you can click on "Ask a related question".