DRV8305: VCPH_UVLO2 fault with higher PWM frequency

Daniel Benjamin83

Part Number: DRV8305

Hi,

I've build a driver board using the DRV8305 and I'm having a problem with the high side charge pump voltage dropping when the PWM frequency increases.

The test scenario is as follows. (Many of these steps are likely unrelated to the issue but I've included them for completeness in case I'm doing something silly.)

All SPI settings are read back to make sure they are really set.

The motor phases are disconnected during this test (no-load)

1. EN_GATE low
2. Wait 10ms
3. EN_GATE high
4. Wait 10ms
5. Poll the 4 status registers until they are all clear
6. Set IDrive
idrivep = gate_to_drain_charge / (turn_on_delay + rise_time)
= 15.3nC / (6ns + 11ns) = 0.9A
Next highest = 1A
idriven = gate_to_drain_charge / (turn_off_delay + fall_time)
= 15.3 / (23 + 3) = 0.59
Next highest = 0.75A
tdrive = 440ns (I forget how I picked this but changing it doesn't affect the behavior)
7. Set OCP
VDS = 2.131V
Deglitch = 7us
Blanking = 7us
8. Set Dead time
88ns
9. Set charge pump threshold
4.6v
10. Set amp gain
10
11. Configure the timer to generate 6 pwm where the high and low channels are complementary
12. Set the pwm frequency to [X], duty to 50%
13. Enable the timer

X is one of 2kHz, 5kHz, 10kHz, 20kHz, 30kHz or 40kHz.

Above 30kHz the driver faults because the VCPH is below the threshold.

The values for the frequencies are:

kHz	VCPH	-vbus
2	22.4	9.4
5	22.2	9.2
10	21.4	8.4
20	19.5	6.5
30	18.2	5.2
40	17.0	4

So it's already below the target 10V buy a substantial amount at only 10kHz.

Things I've tried that made no difference:

1. Extreme values for IDrive (both max and min)
2. Remove the 10Ohm gate resistors and replaced with 0Ohm jumper wires
3. Tested two other boards from the same prototype batch
4. Swapped the DRV8305 for a known genuine one from Mouser
5. Replaced the 2.2uF 16v VCPH cap with a 2.2uF 50V one, added an additional 1uf 50V in parallel

The mosfets I'm using are NCEP60T18 60V 180A 2.9mOhm, datasheet here datasheet.lcsc.com/.../1809131526_Wuxi-NCE-Power-Semiconductor-NCEP60T18_C216780.pdf

There are 2 330uF electrolytic cpactitors on the PCB edge and 5 * 1uF 100V ceramic caps next to each mosfet pair.

I've uploaded the scope captures here, they are fairly boring so I haven't included them inline: https://gist.github.com/cs2dsb/ce8a1a8bdb8608e68f1625c92a1699da
The traces are:
Yellow = A pwm high
Cyan   = A phase
Blue   = Vbus
Pink   = VCPH (Pin 38)

Here is the schematic:

And the front and back of the PCB

Any help is much appreciated.

Thanks,

Daniel

over 4 years ago

0 Daniel Benjamin83 over 4 years ago

Prodigy 40 points

Another nugget of info that might be useful: the DRV gets quite hot when running - approx 55C in a minute or two. Is this expected? I assume the charge pump running at full output constantly would generate a reasonable amount of heat...?

Cheers

Daniel

0 Adam Sidelsky over 4 years ago in reply to Daniel Benjamin83

TI__Guru 65210 points

Daniel,

Let me review this with my team and get back to you later today.

Regards,

-Adam

0 Adam Sidelsky over 4 years ago in reply to Adam Sidelsky

TI__Guru 65210 points

Daniel,

Could you measure VCPH differentially with PVDD at the DRV pin as the reference? This way we can check if the VCPH is regulating correctly. Measuring this to GND makes it harder to track if PVDD is moving or the VCPH is moving.

Looking at the plots, it's hard to see if VCPH is moving, it just looks like noise at the moment, can you increase the range so we can see if and where the VCPH waveform is changing?

How did the VCPH values change with lower IDRIVE?

Can you remove the gate resistors, series and parallel, as well as the CGS, using the lowest IDRIVE and let us know how the VCPH changes?

Usually customers consider 100-200ns of VDS rise/fall time to be quick, I'm not sure how easy it will be to get <20ns of rise/fall time.

Regards,

-Adam

0 Daniel Benjamin83 over 4 years ago in reply to Adam Sidelsky

Prodigy 40 points

Hi Adam,

Thanks for the quick response.

I've removed the gate resistors, pull downs and capacitors.

I don't have a differential probe but I've powered it via an isolated supply and hooked the probe ground up to the other side of the VCPH cap (PVDD) so this should give the measurements you wanted.

In all the captures pink is VCPH and blue is the phase A high side mosfets gate (clipped directly onto through hole leg).

I've written a quick test that toggles the PWM frequency between 5kHz and 42kHz to show how VCPH changes with the frequency.

Here is a zoomed out capture of the transition from 42->5->42 so you can see (from the cursor in the top left) at 5kHz the VCHP is 10.6V and at 42kHz it drops to 5.8V.

There are zoomed in captures of the rising and falling slopes here:
https://gist.githubusercontent.com/cs2dsb/ce8a1a8bdb8608e68f1625c92a1699da/raw/39452dbca32bd87d0d34822f34cb9676dc1894e9/differential_zoomed_in_high_idrive_falling.png
https://gist.githubusercontent.com/cs2dsb/ce8a1a8bdb8608e68f1625c92a1699da/raw/39452dbca32bd87d0d34822f34cb9676dc1894e9/differential_zoomed_in_high_idrive_rising.png

Those 3 were captured with the highest IDRIVE.

The following is the same zoomed out capture with the IDRIVE set to the minimums - 10mA & 20mA (it's the same):
https://gist.githubusercontent.com/cs2dsb/ce8a1a8bdb8608e68f1625c92a1699da/raw/39452dbca32bd87d0d34822f34cb9676dc1894e9/differential_zoomed_out_low_idrive.png

Here are two very zoomed in captures of high and low IDRIVE that show the turn on time changed, proving the setting did take effect:
https://gist.githubusercontent.com/cs2dsb/ce8a1a8bdb8608e68f1625c92a1699da/raw/39452dbca32bd87d0d34822f34cb9676dc1894e9/differential_zoomed_in_high_idrive.png
https://gist.githubusercontent.com/cs2dsb/ce8a1a8bdb8608e68f1625c92a1699da/raw/39452dbca32bd87d0d34822f34cb9676dc1894e9/differential_zoomed_in_low_idrive.png

Thanks,

Daniel

0 Daniel Benjamin83 over 4 years ago in reply to Daniel Benjamin83

Prodigy 40 points

My bad, I only removed the high side gate resistors, not realizing the high and low side are linked internally.

Removing the low side gate, pull-down and capacitance allows it to operate up to 60kHz at a VCPH of > 18V.

So that solves my problem of the fault being triggered.

But before I close this, could you advise what the correct set up is for the gate resistors, pull down and capacitance? Should I just remove all of them? I was planning to have parallel mosfets in a future higher power board which would necessitate some gate resistance, maybe a lower value or 1 or 2 ohms per mosfet?

Thanks,

Daniel

0 Adam Sidelsky over 4 years ago in reply to Daniel Benjamin83

TI__Guru 65210 points

Daniel,

Glad we resolved the issue!

On our drivers with adjustable drive strength you generally don't need gate resistors for single FET per gate output. This being said if you have room then it's some nice insurance in case the minimum drive strength is too much for a small FET or similar.

The gate outputs do have internal VGS pull down resistors so those are generally not needed either.

An external CGS can help to smooth or slow things down if needed but again shouldn't be needed.

When using parallel FETs per gate output, you are right that a few ohms is nice to have so that the two gates don't fight for charge. These resistors should be small as you mentioned and placed close to the FET terminals.

Regards,

-Adam

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DRV8305: VCPH_UVLO2 fault with higher PWM frequency