DRV8703-Q1: DRV8703 report strangs error messages

Hi Harald,

Fault status 0x22 is a gate driver fault and overtemperature shutdown.

I see you've got the minimum dead time and max gate drive current - have you tried adjusting these?  If the device is indeed getting hot, likely one or both of these is not quite right depending on your external FET selection.

Can you provide a link to your FET datasheet?

Regards,
Mike

Hi Mike,

Well, I checked this with the TI Evaluation Board "DRV8703-Q1-EVM". The FETs do not get hot at all and the error can also be easily extinguished by clearing the CLR_FLT bit in register 2. This confuses me. Any explanation?

Regards

Harald

Harald,

The overtemperature shutdown is on the DRV8703 itself.  How long does it take for the OTSD bit to be set?  With a bit more information I can check with our design team under what circumstances this can be triggered.  Data on the FETs and the load would be helpful.

Regarding testing on the EVM, are you saying under the same conditions (registers and load) the fault condition is not triggered?

Regards,
Mike

Hello Mike,

I use the DRV8703 as driver for a servo controller, so the circuit switches in very short intervals (100 – 1000 ms). The motor runs clockwise, stops and after this it might run CCW. The OTSD bit is usually set when the motor is switched off. I can delete the error bit at any time and it will appear again next time the motor is switched off. Interesting: the error led does not lit.

Iam testing with the evaluation board from TI, probably there are CSD18540Q5B installed.

The motor is operated with 18V and has an internal resistance of appr. 1 ohm. An average current of 0.1 to 0.8 A is drawn, depending on speed. However, current peaks might be far higher.

I have some doubts whether the high and low side driver fets are adequately protected but TI claims on page 19 of the DRV8703 documentation no additional protection is needed.

Regards

Harald

Harald,

Thank you, appreciate the additional information.

GDF should only occur with a short on the gate of the FET which is not allowing the FET to switch within the TDRIVE time. Can you read register 0x01 and see if there is a consistent reporting of which GDF monitor is triggering?

Also, can you confirm if nFAULT is being asserted?  You mentioned the LED is not active - could you put a scope on this line and see if it momentarily toggles?

If you have a consistent GDF that is triggering (from register 0x1 above), it would also be helpful to have some scope captures of gate outputs and switch nodes, SHx.

Regards,
Mike

Hi Harald,

Unfortunately it does sound like the EVM could be damaged - the behavior does not make sense for a properly working board.  It is unlikely the IC itself is defective.

The rapid switching could indeed be the cause.  Increasing the bulk capacitance would help, as would adding a surge device, such as the TVS3300 (https://www.ti.com/product/TVS3300

Would you mind sharing feedback on the documentation?  We would like to correct or clarify any mistakes or points of confusion.

Regards,
Mike

Hello Mike,

Pls find below my ideas for an improved schematic. I am very interested in your opinion.The final layout is still pending.

No problem to prepare a list of inconsistencies in the documentation, but this needs some time.

Regards
Harald

Harald,

No issues - would be grateful for any feedback you can provide when you have time.

It seems your image did not attach.  Here is a link to the process if you wish to try again: https://e2e.ti.com/support/site-support/f/1024/t/761613

Regards,
Mike

pls find attached improved schematic ...

Thanks Harald.

It looks like you are concerned about the gate of the FETs getting damaged.  A 17V nominal VGS positive voltage clamp (and -0.7V negative clamp)  is already included in the DRV8703 (spec in section 7.3.12 in the datasheet).  Absolute max VGS for CSD18540Q5B is +/-20V.  Are you adding extra insurance?

We think it is more to do with over-voltage on the supply, and you may want to take a look at using the TVS3300 on the supply as a means to protect against that.

Also, reduce the drive strength for initial board bring-up.

Regards,
Mike

Hello Mike,

The parts to protect the FETs are supposed to discharge the gates faster. This is supposed to reduce current spikes. I also increased TOFF, but it didn't help, either.

Regards
Harald

Hi Harald,

Sorry for the delay.

Talking with the team, high current is possible when (1) the charge pump is somehow loaded externally (2) or internally generated voltages are loaded (3) device somehow getting heated during drive and heat spreading while in HiZ but for that to happen also some kind of high current path needs to be there (like GH/GL getting loaded externally).

Do any of these situations apply?

What PWM frequency are you using?

Regards,
Mike

Hi Mike

To test the circuit, I used the original DRV8703Q-1 Evaluation Board, just removed the 0 ohm resistors to the MSP430 and set Vref to 2.6V. The motor moves accordingly to the duty cycle, but registers 0 occasionally show errors. Register 1 show always error 0x1C. The error in register 0 can be cleared, register 1 cannot. The PWM frequency was set to 20 kHz.

1. The charge pump for the FETs is not loaded externally.
2. The voltage at VCP (Pin 29) is not loaded, except for the voltage divider for Vref.
3. The driver circuit does not heat up during operation.

Suppose the IC has been damaged by the spikes, which means the layout is not good enough. Will replace the driver circuit now und see what happens then.

Regards
Harald

Harald,

Yes, we believe the IC is damaged as well.  Please post back with your findings when the IC is replaced.  Thank you for the update.

Regards,
Mike

Harald,

Thank you for sharing your notes - I will send you a friend request and we can connect through email.

Regards,
Mike