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DRV8706S-Q1EVM: Motor driver error

Part Number: DRV8706S-Q1EVM

Hi Team,

A customer encountered some error while testing the DRV8706S-Q1EVM. Below is his email.

The board has a slightly strange behavior and i hope you can help me to understand what is happens
Sometimes when i power on the board throught J1 and also connect to the PC, just DVDD led stay ON and board are not powered.(led STATUS is OFF).
Sometimes is connecting from the firs power but nFaults led stay active and can’t used the board. To make connection and deactivate nFault need to perform a few times some Power-ON OFF.
But now what is happed, nFault stay always ON and can’t do anything.I try to clear from register and also perform many power ON-OFF , but nothing change.
Below can be observed what fault status are avaible now that i can’t clear them.
Do you think you can help me on this situation? Do you know what can i do to clear nFaul status ?

Can you please help us resolve this problem?

Regards,

Danilo

  • Hi Danilo,

    By default the DVDD supply is regulated from the PVDD supply. 

    When only the USB connection is present, we're likely back-driving the MSP430 through the UART pins, and the DVDD rail.  The desired power sequence in this case is to always supply PVDD first, then connect USB.  Admittedly this is a bit clunky when you are going through regular PVDD power cycles because this means also disconnecting the USB connection).

    If we wish to power DVDD from the USB connection, and avoid the back-driving scenario, R77 can be removed, and installed in position R75.

    When the status LED is not lit, try pressing the reset button on the EVM after the supplies are properly connected.  This should clear the fault as well.

    We can also check the IC_STAT_2 register, and confirm the source of the under-voltage fault.  Likely it is PVDD.  In this case, it is probably a situation where the bulk cap is still charging while the voltage monitors are active, and the PVDD is fault is triggered.  The PVDD fault can be configured to automatically recover, such that the fault clears automatically when PVDD rises above the minimum threshold.  This can be configured in the UVOV_CTRL register.

    Regards,
    Mike

  • Hello Michael,

    I make all advice for you but still nothing.nFault still active.

    I make some measurement on the board to try understand what have this behavior and I find that Charge Pump voltage of the driver is deactivated.

    At CP output nothing happened.

    Than I try to clear CLR_FLT but can't be clear.It set again after reset.

    Also I try to change VCP_UV_MODE from Latched Fault mode to Automatic Recovery Mode but same behavior, after I change any register value are put immediately to default value.

    VCP_UV fault stay set no mather what o try to do.

    What else I can verify or perform? Do you think driver can enter in a loop and deactivate internal CP ?

    If you can help me,what I can do will be very helpfully for me because I already has a week delay from my test on DRV8706 driver that company think to used in future for drive the motors.

    Thanks you!

    Have a nice day!


  • Hi Alberto,

    Sorry you're having some troubles.  This doesn't sound normal.  The EVM includes a probe point for VCP near U1.  Can you send a scope trace showing your supply and VCP ramping?  For this test you should be able to leave USB disconnected.

    Regards,
    Mike

  • Hello Michael,

    Thank you for your support.

    I perform tests and attached scope capture with traces.

    Voltage from VCP (out 30 of driver) is in yellow and Vsupply taken from EVM power J1 are in blue.

    VCO try to start but immediately stop.

    Same behavior has CPH and CPL.

    Do you think it is an driver issue?

    I can remove R1 resistance from the board to see if issue is from the driver or from circuit around him.

    What do you think?

    Thanks you!

  • Alberto,

    Thank you for the scope traces - let me talk to some folks here before you modify your board.  I will get back with you tomorrow.

    Regards,
    Mike

  • Alberto,

    Still working on an explanation on your observations here.  Do you have only one EVM?

    Regards,
    Mike

  • Alberto,

    Let me temporary close this post since MIke takes off this week. if you have some updates needs to put into this thread, you can post it after thanksgiving.

  • Hi Alberto,

    We believe the issue is related to the EVM and will close this post.  Please send me a "friend request" for us to work this offline.

    Regards,
    Mike