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DRV8306: ISEN rising over VLIMIT but Gate drive doesn't seem to cutoff

Part Number: DRV8306

I am testing DRV8306 in a new design of ours and came across a strange behaviour. Based on cycle by cycle current limit feature, if at any time the ISEN goes above VLIMIT, all three upper FETs should be cutoff. But in my instance, I can see the ISEN ramping up to 480mV, but the upper FET is still being driven. This happens once per revolution. 

Any explanations?

Also the Gate drive doesn't seem to be a digital signal. 

One full 10Hz cycle below.

 

Thanks,

Kay

  • Hello Kaushalya,

    Thank you for your questions!

    Can you zoom in on the event where ISEN > 480mV? We should check the transient behavior of these pins such that we can see the 5us deglitch time of the VLIMIT. (I recommend setting 5us/div in your scope). Please capture ISEN, GHA, GLA, and nFAULT on one shot and SEN, GHA, FGOUT, and HPA on another shot.

    • Possible miss-commutation due to noise on the Hall inputs
    • Noise coupling on ISEN pin

    The high-side gate drive signal (GHx) is not a digital signal, it is a power signal.

    • For the MOSFET OFF, GHx is applied as 0V with respect to the SHx (i.e. the motor terminal) - when current is recirculating but the MOSFET is OFF, you will see some voltage on GHx (w.r.t. GND) due to induced voltage on SHx. If you check GHx - SHx you see that the voltage applied to the high-side MOSFET gate is 0V.
    • For the MOSFET ON, GHx is applied as ~10V with respect to the SHx (i.e. the motor terminal).

    Thanks,

    Matt

  • Hi Matt,

    Many thanks for your reply. It reminded me that I have to look at GHA with respect to SHA. My apologies. 

    We managed to figure out what is happening. It was due to an anomaly of the hall sensor signals. Strangely two phases goes out of sync every revolution. I checked with another motor and all good.

    Thanks again.

    Kaushalya

  • Hello Kaushalya,

    Glad I could help! But I think you helped yourself mostly.

    Thanks,

    Matt

  • Hi Matt,

    Thought of sending the hall sensor anomaly I saw. 

    This is the ISEN with three hall sensors A,B and C. The issue I think happening is with B and C sensors right at the point of the high ISEN pulse. The falling edge of the C sensor should lag behind rising edge of B sensor, but the two edges coincide.

    Thanks,

    Kaushalya