DRV8323: How to verify design(DRV8323), when everyting is working

Hello Martin,

First off, your nominal battery of 52V scares me a little bit. DRV8323 has an absolute maximum rating of 65V, and if the supply pumps up higher than that you will damage the DRV8323.

Things that I recommend for you to check:

• Measure VM during operation of the motor, as well as under acceleration and deceleration to ensure that VM does not exceed 65V. You can trigger a fault shutdown (for example, by loading down the charge pump or increasing the output current artificially) to confirm that a fault shutdown event does not cause VM to exceed 65V.
• Measure VCP during operation, acceleration, and deceleration to confirm that the VCP voltage remains stable (VM+10V)
• Observe the high-side gate GHx  (w.r.t SHx) and the low-side gate (w.r.t. GND) during operation and confirm that the output voltages are correct (GHX = SHx + 10V when ON, GLx = 10V when ON). You can check to see if your circuit is causing the high-side or low-side gate voltage to be pulled down or pushed up unintentionally.
• Check GHx, SHx, GLx, SPx, and SNx during operation at high current for positive and negative voltage spikes due to switching (zoom in on the switching waveform). Ensure that you do not violate the abs max ratings of these pins.

On your last waveform, this appears to be the motor in coast state. You can confirm this by looking at GHx, SHx, and GLx for this phase to see which FETs (if any) are ON.

Hi Martin, VCP seems quite reasonable with around 2V of ripple during operation. You can always try sizing up the VCP capacitor or slightly increasing the rating of the CPL-CPH capacitor. I don't think these steps are needed. VM looks like it has +/-5V of ripple, which keeps VM below 65V during operation. Keep an eye on this one as you are only 5V away from the abs max rating of the part. It would be good to check SHx while switching, because I have seen cases where SHx can exceed VM due to trace inductance or slow high-side body diode conduction. You want to make sure SHx does not exceed the 65V abs max rating as well. To mitigate this kind of effect you would need snubbers. Since you are operating at around 50V, I would recommend a 100V rating on the VM ceramic bypass capacitor (0.1uF) and the CPH-CPL capacitor. This is so that you do not loose too much effectiveness because of voltage de-rating. Thanks, Matt

Hi Martin,

Thanks for these plots. You are certainly close to the limit with the coupled noise - 63.6V. I don't see any supply pumping beyond a diode drop (body diode of the high-side MOSFET). You may consider snubbers on the output to try to combat this noise (assuming it is not just an artifact of the scope).

On the first plot I do see some significant negative voltage spiking (lower than -10V). This could be due to insufficient local bypass capacitance (high-side MOSFET drain to low-side MOSFET source) or too high slew rate for IDRIVE sink.

How much sizing up of VCP are you thinking? It's 1uF now. --> It doesn't hurt to size up to a 25V rating (to combat capacitor de-rating).

Thanks,

Matt

Hi Martin,

I may be more worried about the MOSFETs now, since they have an abs max VSD rating of only 60V.

Qgd is 7nC, meaning our rise times will be ~58ns and our fall times will be ~29 ns. It's a bit fast on the falling edge, and you may consider going to the next lowest setting. This may help reduce negative voltage spikes.

Increasing the drain to source capacitors can quickly tell you if you have inductance in the supply and ground path that could use some extra mitigation. If the ringing amplitude is reduced, then that is a good sign.

Thanks,

Matt

Hi Martin,

Will lowering IDRIVE lower power usage for DRV8323 so it will run cooler? --> Unfortunately no, this is to try to reduce the switching spikes on SHx and other output nodes. the DRV8323 will still have about the same power dissipation. DRV8323 is single supply and so it will be generating all internal voltages from your VM supply and that means the power dissipation is high when you operate at higher voltages. Split-supply devices like DRV8353 allow for a separate 15V supply to lower the power dissipation inside the IC (see this app note).

Is there a reason not to go back to the old setting? --> If there is no reduction in spikes, then you should use the higher setting

If there is a reason to have a bigger value capacitor this will impact the cooling, since 0.1uF is the biggest 100V value in 0603. We will then need a thicker thermal pad below to make up the hight difference. --> A larger capacitor will do a better job to mitigate any inductance in the supply and ground paths, so more is better. The only issue with too large capacitance from the high-side drain to the low-side source is that your current sense measurement can be impacted at the beginning of the PWM cycle due to extra current from the capacitor.

Thanks,

Matt