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DRV8402: DRV8402 CBC current limiting without reason?

Part Number: DRV8402

Gents,

The issue in a nutshell is on approximately 25% of our PCAs we’re seeing situations where the DRV8402 appears to act as though it’s using CBC (CycleByCyle Current Limiting) even though the current being delivered is nominal.

The telling part is the following scope shots where you can see the PWM_OUTPUT just shutdown while the PWM_input remains active and all of the other control inputs are stable.

C1: PWM_OUT

C2: PWM_IN

C3: DRV8402 FAULT_N

C4: Current of the attached load

Error while 48V in (C4) is stable:

  

ERROR while RESET_N is stable

I even thought to monitor the DRV8402 BST_B (C4) during the error but there were no clues there.

 

And lastly I scoped OTW_N (C4) which was also deasserted during the error.

Attaching schematic for reference.

ACU_motor_driver.pdf

  • Hi Matt,

    I'm going to close this post and respond to your email.
  • James,

    Since this affects everyone who is also in the same boat with the DRV8432 it makes sense to keep the dialog in the forum. Don't you think?

    The specific answer I'm looking for is how can the DRV8402 going into CBC current limiting without asserting FAULT_N? 

    Because that's what I'm seeing on a large number of the DRV8402.

    -Regards,

  • Matt,

    I've asked our local field sales contact to set up a call between you and my group to discuss how to move forward with investigating this issue.

    We can continue to keep our discussion on the forum or over email, whichever you prefer. If we continue the discussion over email, I can come back to this thread and post the resolution here to benefit other customers. Either way, I prefer to keep all the information regarding this issue in one place so I can easily reference it while debugging.

  • James, Sounds good. 

    Turns out the issue is noise on VREG when the high side FET turns on. It falsely tricks the internal logic into going into an undocumented current limit mode where it shuts off the high side FET enables for 10 cycles. The fix is to make sure VREG is properly bypassed and to help this isolate the  AGND node from switching GND node by a 1 ohm resistor. 

    Thanks for all the help!

  • Matt,

    I glad we were able to get an answer for you! Thanks for following up with this post and marking it as resolved.

  • Is the DRV8432 just as susceptible to this or is this something that was addressed in the silicon?  I know the datasheet has the 1 Ohm resistor mentioned so we do have it in our design.  We have not seen this problem over the last couple of years with the DRV8432.  I do want to know how the DRV8402 compares to the DRV8432 in this specific area so I can know whether to look for this if I substitute in an DRV8402 for a DRV8432.

  • Hello Ivek Engineer,

    The 10-cycle delay was caused by some undocumented logic in the DRV8402. This logic was removed in the DRV8432.
  • Does this apply to all modes or only certain modes? If I have the 1 Ohm resistor in my design am I less likely to see this?
  • Hello Ivek Engineer,

    Matt (from the posts above) saw the current-limiting issue disappear when he used mode setting M3 =1, M2 = 0, M1 = 0. At this time we are not able to simulate the logic in this chip to double-check, so all I can offer is his experimental observation.

    The 1-ohm resistor between AGND and GND should make this false current-limiting mode less likely to happen. Our internal documentation recommends using a 2.7-Ohm resistor, so that value may help mitigate possible noise issues further.