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Original question:

DRV8301: Overcurrent protection and VDS register settings

DRV8301: No load, Vds overcurrent flag keeps triggering, PULLING HAIR OUT :)

Andrew DeWeerd
Prodigy 100 points
Part Number: DRV8301

This happens across two identical boards.  I start PWM.  All 3 channels run properly for about 1 second.  Then I get the FAULT and FETHC_OC flags, and the C phase gate outputs goes hi-z.  Both boards do the same thing.  

This is a re-layout (Rev 2) of an identical design, except I changed the FETs and did some rearranging of the parts on the board.  Same exact code on Rev 1 runs fine.  

I trap the fault in the debugger then read the SPI registers, which then confirm what I stated above.

Things I've tried:

  1. Setting OCP_Mode to 2 or 3 - oddly, the channel still turns off - shoudn't this circumvent the protection mechanisms altogether?
  2. Reducing gate drive current - no effect (I also tried higher gate resistance (10 ohm) with no change
  3. Set OC_ADJ_SET to 31 (2.4v).  No effect.
  4. I've looked at all supplies around the driver - they look cleaner than on the older board.  
  5. I've monitored Vds vs gate signal and it looks proper I think.  

I have scope traces galore - can post.  Thanks in advance for any help.  I'm ready to jump out the window right now :(

Here's the parts of the schematic that matter:

  • 0
    Prodigy 100 points

    Also, I did remove the parallel FET and the gate protection passives (resistor, zener) to make sure that wasn't doing something awkward.  Didn't help.

  • 0
    Prodigy 100 points

    A few scope shots.  I put the probes right on the DRV8301 pin for that signal. 

    1. Yellow: PVDD ( ~ 28V) 
    2. Green: SH_C signal from high-side FET source pin
    3. Purple: GH_C (gate drive signal)
    4. Red: nFault signal (when this goes low, the FETHC_OC flag also get set in the status register, confirmed in debugger

    Pic 1:  After several pulses, fault triggered.

    Pic 2:  Zoom of a non-offending pulse

    Pic 3:  Zoom of the pulse that triggered the fault.

  • 0 in reply to Andrew DeWeerd
    TI__Guru 65320 points

    Andrew,

    It looks like your issue is that you're operating at almost 100% duty cycle which is tough for a Bootstrap architecture. The BST cap is not being refreshed enough (this happens when the SHx is low) and the HS gate is struggling. This is not allowing the HS FET to fully turn on which is triggering a VDS fault.

    Can you adjust something so that you don't have to operate at 100%?

    Regards.

    -Adam

  • 0 in reply to Adam Sidelsky
    Prodigy 100 points

    RIght, that makes sense.  Charge pump doesn't pump by itself!  Doesn't look like the duty cycle is too short, but I don't know what "enough" means.  

    That PWM duty cycle comes right out of my SVM (3-phase sinusoidal modulation) table.  I guess I could modify the table.  Will get back regarding this.

    (note that the same code does work on an older board, but perhaps it was always a borderline issue)

  • 0 in reply to Andrew DeWeerd
    Prodigy 100 points

    RESOLVED!  (well, I get to continue debugging the board)

    Adam was correct, the duty cycle was too low to service the boost regulators, causing the high-side FETs to fail to turn on, which then triggered the Vds overcurrent check by the driver.

    I had to ensure the PWM duty cycle never got below about 5%.  2% was too little.  

    Thanks Adam!