This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Unable to power on HDMI



[    1.565002] Raw EDID:
[    1.565032]          00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[    1.565032]          00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[    1.565032]          00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[    1.565032]          00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[    1.565063]          00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[    1.565063]          00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[    1.565063]          00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[    1.565063]          00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
[    1.568664] [drm] Enabling DMM ywrap scrolling
[    1.573028] Console: switching to colour frame buffer device 128x48
[    1.576354] omapdrm omapdrm.0: fb0: omapdrm frame buffer device
[    1.576385] omapdrm omapdrm.0: registered panic notifier
[    1.576385] [drm] Initialized omapdrm 1.0.0 20110917 on minor 0
[    1.576599] ehci-omap 4a064c00.ehci: port 2 reset complete, port enabled
[    1.576629] ehci-omap 4a064c00.ehci: GetStatus port:2 status 001005 0  ACK POWER sig=se0 PE CONNECT
[    1.578002] omapdss HDMI error: M = 812 Mf = 131072
[    1.578033] omapdss HDMI error: range = 0 sd = 8
[    1.773712] Failed to set PLL_PWR_STATUS
[    1.774932] omapdss HDMI error: failed to power on device
[    1.774932] omapdss error: failed to power on

I am getting  Failed to set PLL_PWR_STATUS while booting though usbboot. Using the defualt device tree provided(omap5-uevm.dtb). Am I missing something from my end?



  • Hello Gowthami,

    I think, your problem is due to not configured DSS registers in the PRCM.

    I suggest you checking of the following registers and control bits:

    Clock configuration:

    - HDMI_PHY_GFCLK Clock Control CM_DSS_DSS_CLKCTRL[9] OPTFCLKEN_48MHZ_CLK

    - HDMI_PHY_GFCLK Clock Status CM_DSS_CLKSTCTRL[11] CLKACTIVITY_HDMI_PHY_GFCLK

    - HDMI_CEC_GFCLK Clock Control CM_DSS_DSS_CLKCTRL[11] OPTFCLKEN_32KHZ_CLK

    - HDMI_CEC_GFCLK Clock Status CM_DSS_CLKSTCTRL[12] CLKACTIVITY_HDMI_CEC_GFCLK

    - DSS_SYS_GFCLK Clock Status CM_DSS_CLKSTCTRL[10] CLKACTIVITY_DSS_SYS_GFCLK
    - DSS_SYS_GFCLK Clock Control CM_DSS_DSS_CLKCTRL[10] OPTFCLKEN_SYS_CLK
    - DSS_GFCLK Clock Status CM_DSS_CLKSTCTRL[9] CLKACTIVITY_DSS_GFCLK
    - DSS_GFCLK Clock Control CM_DSS_DSS_CLKCTRL[8] OPTFCLKEN_DSSCLK

    - DSS_L3_GICLK and DSS_L4_GICLK Clock Status CM_DSS_CLKSTCTRL[8] CLKACTIVITY_DSS_L3_GICLK
    - Clock Domain State Transition Control CM_DSS_CLKSTCTRL[1:0] CLKTRCTRL

    All of these registers must set to enable the clock signals to DSS subsystem. The HDMI is part from DSS.

    Then check the power control registers to HDMI:

    - PM_DSS_PWRSTCTRL[1:0] POWERSTATE 0x3 - when is set 0x3 the DSS module is running.

    - PM_DSS_PWRSTST - status register for power state of DSS.

    Best regards,

    Yanko