TPS54A20: Transient design

The product folder has reference designs. 

www.ti.com/.../TPS54A20

Hi David, thanks for your quick response. I check all documents and cannot find the application notes for the control loop design. The closing thing I get is the PMP15008 Test Report. It demonstrates the reference design meets the specs of Output voltage deviation is within ±2% of the output voltage when 5 A load steps with 1 A/µs slew rate.

How the control loop is designed to meet these specs? Is there anything else the customers should be aware of in the control design?

Thanks

The control loop is proprietary and not discussed in public forums.

Customers follow the design procedure in the datasheet or use webench to determine the external components. 

webench or pspice simulations can verify the performance.  

Does TI provide any guidance on the design of bandwidth, phase margin, etc?

Thanks

 I am searching for the engineer with the small signal models and simplis model  and will get back with you

Thanks for letting me know. I appreciate your support