Hi team,
I have a question about the FLT signla.
Will the FLT signal be asserted when the device is in the condition that reverse voltage protection(Vin<Vout) at EN=Low(disable) state?
Regards,
Yamaguchi
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Hi team,
I have a question about the FLT signla.
Will the FLT signal be asserted when the device is in the condition that reverse voltage protection(Vin<Vout) at EN=Low(disable) state?
Regards,
Yamaguchi