• State Resolved
  • Locked Locked
  • Replies 3 replies
  • Answers 1 answer
  • Subscribers 62 subscribers
  • Views 211 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

UC3825: minimum duty cycle limit

user5823347
Prodigy 10 points
Part Number: UC3825

Uc3825 has the minimum duty cycle limit, such as 5%. If the duty cycle is less than 5%, the duty ratio of the chip output may become 0. I want to know the principle.

  • +1
    TI__Guru 51835 points

    Hi,

    The PWM is produced by comparing the ramp and the ref. When the ref is < RAMP bottom, there will be no pulses present so to become zero duty. In theory, the duty should be ok to be < 5% become jump to 0%. But in practice on reason 0 < duty < 5% may not be achieved, because propagation delay, the ref and the ramp noise, the comparator input offset needed, are all among why. UC3825 is an old device so 5% is already very good.

    A newer device may have better min duty on the improvement to the mentioned,

  • 0 in reply to Hong Huang
    Prodigy 10 points

    Why do different RT and CT correspond to different minimum duty cycles?

  • 0 in reply to user5823347
    TI__Guru 51835 points

    Hi,

    Different RT and CT give different speed and noise level which interact with the mentioned factors. So different min duty can be resulted.