TPSM41615: Layout suggestion of TPSM41615

Feng bin Su

Expert 8110 points

Part Number: TPSM41615
Other Parts Discussed in Thread: TPSM41625

Hi team,

My customer is evaluating our TPSM41615 and they would like to consult with of the layout placement of TPSM41615.

For layout of TPSM41615, is it OK to place digital via under package of TPSM41615?

over 3 years ago

0 Alec Biesterfeld over 3 years ago

TI__Expert 5310 points

Hello,

I would not recommend placing digital vias under the TPSM41625. There are some pins in that area of the package that are sensitive to noise, and the layout on figure 10-3 in the datasheet recommends keep outs on the top layer under the device in the area in which the digital vias are placed.

0 Feng bin Su over 3 years ago in reply to Alec Biesterfeld

TI__Expert 8110 points

Hi Alec,

Thank for your help. I am reviewing customer's layout of TPSM41615.

And, they have put the cin at the opposite layer of module (TPSM41625). Please refer the below figure. Would you have concern about it?

0 Alec Biesterfeld over 3 years ago in reply to Feng bin Su

TI__Expert 5310 points

I don't have much concern in placing the cin capacitors under the module on the bottom layer of the board. Please ensure there are several vias from the bottom layer to the PVIN and PGND pads as well.

Sincerely,

Alec Biesterfeld

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TPSM41615: Layout suggestion of TPSM41615